2 Mbit Flash + 1 Mbit SRAM ComboMemory
SST31LF021 / SST31LF021E
Data Sheet
AC CHARACTERISTICS
TABLE 9: SRAM MEMORY BANK READ CYCLE TIMING PARAMETERS (VDD = 3.0-3.6V)
SST31LF021-70
SST31LF021E-300
Symbol
TRCS
Parameter
Min
Max
Min
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Read Cycle Time
70
300
TAAS
Address Access Time
70
70
35
300
300
150
TBES
Bank Enable Access Time
Output Enable Access Time
BES# to Active Output
TOES
1
TBLZS
0
0
15
15
1
TOLZS
Output Enable to Active Output
BES# to High-Z Output
Output Disable to High-Z Output
Output Hold from Address Change
1
TBHZS
25
25
30
30
1
TOHZS
TOHS
0
10
ns
T9.4 392
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 10: SRAM MEMORY BANK WRITE CYCLE TIMING PARAMETERS (VDD = 3.0-3.6V)
SST31LF021-70
Min Max
SST31LF021E-300
Symbol
TWCS
TBWS
TAWS
Parameter
Min
300
230
230
0
Max
Unit
ns
Write Cycle Time
70
60
60
0
Bank Enable to End-of-Write
Address Valid to End-of-Write
Address Set-up Time
Write Pulse Width
ns
ns
TASTS
TWPS
TWRS
TDSS
ns
60
0
200
0
ns
Write recovery Time
Data Set-up Time
ns
30
0
150
0
ns
TDHS
Data Hold from Write Time
ns
T10.4 392
TABLE 11: FLASH READ CYCLE TIMING PARAMETERS (VDD = 3.0-3.6V)
SST31LF021-70
SST31LF021E-300
Symbol Parameter
Min
Max
Min
Max
Units
ns
TRC
TBE
TAA
Read Cycle Time
70
300
Bank Enable Access Time
Address Access Time
70
70
40
300
300
150
ns
ns
TOE
TBLZ
Output Enable Access Time
BEF# Low to Active Output
OE# Low to Active Output
BEF# High to High-Z Output
OE# High to High-Z Output
Output Hold from Address Change
ns
1
1
0
0
0
0
ns
TOLZ
TBHZ
ns
1
1
15
15
60
60
ns
TOHZ
ns
1
TOH
0
0
ns
T11.3 392
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
©2001 Silicon Storage Technology, Inc.
S71137-03-000 10/01 392
9
SST [ SILICON STORAGE TECHNOLOGY, INC ]
