16 Mbit Concurrent SuperFlash
SST36VF1601E / SST36VF1602E
Data Sheet
Data Protection
Software Data Protection (SDP)
The devices provide both hardware and software features
to protect nonvolatile data from inadvertent writes.
These devices provide the JEDEC standard Software Data
Protection scheme for all data alteration operations, i.e.,
Program and Erase. Any Program operation requires the
inclusion of the three-byte sequence. The three-byte load
sequence is used to initiate the Program operation, provid-
ing optimal protection from inadvertent Write operations,
e.g., during the system power-up or power-down. Any
Erase operation requires the inclusion of the six-byte
sequence. The devices are shipped with the Software Data
Protection permanently enabled. See Table 5 for the spe-
cific software command codes. During SDP command
sequence, invalid commands will abort the device to Read
mode within TRC. The contents of DQ15-DQ8 can be VIL or
VIH, but no other value during any SDP command
sequence.
Hardware Data Protection
Noise/Glitch Protection: A WE# or CE# pulse of less than 5
ns will not initiate a Write cycle.
VDD Power Up/Down Detection: The Write operation is
inhibited when VDD is less than 1.5V.
Write Inhibit Mode: Forcing OE# low, CE# high, or WE#
high will inhibit the Write operation. This prevents inadvert-
ent writes during power-up or power-down.
Hardware Block Protection
The devices provide hardware block protection which pro-
tects the outermost 8 KWord in the larger bank. The block
is protected when WP# is held low. See Figures 1, 2, 3,
and 4 for Block-Protection location.
Common Flash Memory Interface (CFI)
These devices also contain the CFI information to
describe the characteristics of the devices. In order to
enter the CFI Query mode, the system must write the
three-byte sequence, same as the Software ID Entry com-
mand with 98H (CFI Query command) to address 555H in
the last byte sequence. See Figure 16 for CFI Entry and
Read timing diagram. Once the device enters the CFI
Query mode, the system can read CFI data at the
addresses given in Tables 6 through 8. The system must
write the CFI Exit command to return to Read mode from
the CFI Query mode.
A user can disable block protection by driving WP# high.
This allows data to be erased or programmed into the pro-
tected sectors. WP# must be held high prior to issuing the
Write command and remain stable until after the entire
Write operation has completed. If WP# is left floating, it is
internally held high via a pull-up resistor, and the Boot
Block is unprotected, enabling Program and Erase opera-
tions on that block.
Hardware Reset (RST#)
Security ID
The RST# pin provides a hardware method of resetting the
devices to read array data. When the RST# pin is held low
for at least TRP, any in-progress operation will terminate and
return to Read mode (see Figure 20). When no internal
Program/Erase operation is in progress, a minimum period
of TRHR is required after RST# is driven high before a valid
Read can take place (see Figure 19).
The SST36VF160xE devices offer a 256-bit Security ID
space. The Secure ID space is divided into two 128-bit seg-
ments—one factory programmed segment and one user
programmed segment. The first segment is programmed
and locked at SST with a unique, 128-bit number. The user
segment is left un-programmed for the customer to pro-
gram as desired. To program the user segment of the
Security ID, the user must use the Security ID Program
command. End-of-Write status is checked by reading the
toggle bits. Data# Polling is not used for Security ID End-of-
Write detection. Once programming is complete, the Sec
ID should be locked using the User Sec ID Program Lock-
Out. This disables any future corruption of this space. Note
that regardless of whether or not the Sec ID is locked, nei-
ther Sec ID segment can be erased. The Secure ID space
can be queried by executing a three-byte command
sequence with Query Sec ID command (88H) at address
555H in the last byte sequence. See Figure 18 for timing
diagram. To exit this mode, the Exit Sec ID command
should be executed. Refer to Table 5 for more details.
The Erase operation that has been interrupted needs to be
reinitiated after the device resumes normal operation mode
to ensure data integrity.
©2005 Silicon Storage Technology, Inc.
S71274-03-000
11/05
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SST [ SILICON STORAGE TECHNOLOGY, INC ]
