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SST37VF020-90-3C-PH 参数 Datasheet PDF下载

SST37VF020-90-3C-PH图片预览
型号: SST37VF020-90-3C-PH
PDF下载: 下载PDF文件 查看货源
内容描述: 512千位/ 1兆位/ 2兆位/ 4兆位( X8 )许多时间内可编程Flash [512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit (x8) Many-Time Programmable Flash]
分类和应用: 内存集成电路光电二极管
文件页数/大小: 16 页 / 166 K
品牌: SST [ SILICON STORAGE TECHNOLOGY, INC ]
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512 Kbit / 1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST37VF512 / SST37VF010 / SST37VF020 / SST37VF040
Data Sheet
TABLE 4: R
EAD
M
ODE
DC O
PERATING
C
HARACTERISTICS
V
DD
=2.7-3.6V
(Ta = 0°C to +70°C (Commercial))
Limits
Symbol
I
DD
Parameter
V
DD
Read Current
12
I
SB
I
LI
I
LO
V
IL
V
IH
V
IHC
V
OL
V
OH
I
H
Standby V
DD
Current
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Input High Voltage (CMOS)
Output Low Voltage
Output High Voltage
Supervoltage Current for A
9
for Read-ID
V
DD
-0.3
200
0.7 V
DD
V
DD
-0.3
0.2
15
1
10
0.8
mA
µA
µA
µA
V
V
V
V
V
µA
Min
Max
Units
Test Conditions
Address input=V
IL
/V
IH
, at f=1/T
RC
Min
V
DD
=V
DD
Max
CE#=OE#=V
IL
, all I/Os open
CE#=V
IHC
, V
DD
=V
DD
Max
V
IN
=GND to V
DD
, V
DD
=V
DD
Max
V
OUT
=GND to V
DD
, V
DD
=V
DD
Max
V
DD
=V
DD
Min
V
DD
=V
DD
Max
V
DD
=V
DD
Max
I
OL
=100 µA, V
DD
=V
DD
Min
I
OH
=-100 µA, V
DD
=V
DD
Min
CE#=OE#=V
IL
, A
9
=V
H
Max
T4.3 397
TABLE 5: P
ROGRAM
/E
RASE
DC O
PERATING
C
HARACTERISTICS
V
DD
=2.7-3.6V
Limits
Symbol Parameter
I
DD
I
LI
I
LO
V
H
I
H
V
DD
Erase or Program Current
Input Leakage Current
Output Leakage Current
Supervoltage for A
9
and OE#
Supervoltage Current for A
9
and OE#
Min
Max Units Test Conditions
20
1
10
11.4 12.6
200
mA
µA
µA
V
µA
(Ta = 25°C±5°C)
CE#=V
IL,
OE#=V
H
, V
DD
=V
DD
Max, WE#=V
IL
V
IN
=GND to V
DD
, V
DD
=V
DD
Max
V
OUT
=GND to V
DD
, V
DD
=V
DD
Max
OE#=V
H
Max, A
9
=V
H
Max, V
DD
=V
DD
Max, CE# = V
IL
T5.1 397
TABLE 6: R
ECOMMENDED
S
YSTEM
P
OWER
-
UP
T
IMINGS
Symbol
T
PU-READ1
T
PU-WRITE
1
Parameter
Power-up to Read Operation
Power-up to Write Operation
Minimum
100
100
Units
µs
µs
T6.1 397
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 7: C
APACITANCE
Parameter
C
I/O
1
(Ta = 25°C, f=1 Mhz, other pins open)
Description
I/O Pin Capacitance
Input Capacitance
Test Condition
V
I/O
= 0V
V
IN
= 0V
Maximum
12 pF
6 pF
T7.0 397
C
IN1
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 8: R
ELIABILITY
C
HARACTERISTICS
Symbol
N
END1
T
DR1
I
LTH1
Parameter
Endurance
Data Retention
Latch Up
Minimum Specification
10,000
100
100 + I
DD
Units
Cycles
Years
mA
Test Method
JEDEC Standard A117
JEDEC Standard A103
JEDEC Standard 78
T8.3 397
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
©2001 Silicon Storage Technology, Inc.
S71151-02-000 5/01
397
6