16 Megabit Multi-Purpose Flash
SST39VF160Q / SST39VF160
Advance Information
T
ABLE
2: P
IN
D
ESCRIPTION
Symbol
Pin Name
A
19
-A
0
Address Inputs
Functions
To provide memory addresses. During sector erase A
19
-A
11
address lines
will select the sector. During block erase A
19
-A
15
address lines will select
the block.
To output data during read cycles and receive input data during write
cycles. Data is internally latched during a write cycle. The outputs are in
tri-state when OE# or CE# is high.
To activate the device when CE# is low.
To gate the data output buffers.
To control the write operations.
To provide 3-volt supply (2.7-3.6V)
Supplies power for input/output buffers. It should be either tied to V
DD
(2.7 - 3.6V) for 3V I/O or to a 5.0V (4.5V - 5.5V) power supply to
support 5V I/O. (Not offered on SST39VF160 device, instead it is a NC)
Unconnected pins.
329 PGM T2.6
1
2
3
4
5
6
7
DQ
15
-DQ
0
Data Input/output
CE#
OE#
WE#
V
DD
V
DDQ
Chip Enable
Output Enable
Write Enable
Power Supply
I/O Power Supply
Vss
NC
Ground
No Connection
T
ABLE
3: O
PERATION
M
ODES
S
ELECTION
Mode
CE#
OE#
Read
V
IL
V
IL
Program
V
IL
V
IH
Erase
V
IL
V
IH
Standby
Write Inhibit
Write Inhibit
Product Identification
Hardware Mode
Software Mode
V
IH
X
X
V
IL
V
IL
X
V
IL
X
V
IL
V
IL
WE#
V
IH
V
IL
V
IL
X
X
V
IH
V
IH
V
IH
A9
A
IN
A
IN
X
X
X
X
V
H
A
IN
DQ
D
OUT
D
IN
X
High Z
High Z/ D
OUT
High Z/ D
OUT
Manufacturer Code (00BF)
Device Code (2782)
Address
A
IN
A
IN
Sector or block address,
XXh for chip erase
X
X
X
A
19
- A
1
= V
IL
, A
0
= V
IL
A
19
- A
1
= V
IL
, A
0
= V
IH
See Table 4
329 PGM T3.2
8
9
10
11
12
13
14
15
16
© 1998 Silicon Storage Technology, Inc.
5
329-09 11/98
SST [ SILICON STORAGE TECHNOLOGY, INC ]
