FlashFlex MCU
SST89E516RD2 / SST89E516RD
SST89V516RD2 / SST89V516RD
Data Sheet
TLHLL
ALE
TAVLL
TLLPL
TPLAZ
TLLAX
TLLIV
TPLIV
TPXAV
TPXIZ
TPXIX
INSTR IN
A0 - A7
TPLPH
PSEN#
PORT 0
A0 - A7
TAVIV
PORT 2
A8 - A15
A8 - A15
1273 F32.0
FIGURE
14-3: External Program Memory Read Cycle
TLHLL
ALE
TWHLH
PSEN#
TLLDV
TRLRH
TLLWL
RD#
TAVLL
TLLAX
TRLAZ
TRLDV
TRHDZ
TRHDX
PORT 0
A0-A7 FROM RI or DPL
TAVWL
TAVDV
DATA IN
A0-A7 FROM PCL
INSTR IN
PORT 2
P2[7:0] or A8-A15 FROM DPH
A8-A15 FROM PCH
1273 F33.0
FIGURE
14-4: External Data Memory Read Cycle
©2007 Silicon Storage Technology, Inc.
S71273-03-000
1/07
72