L4978
Table 2. Block Diagram
VCC
5
THERMAL
SHUTDOWN
VOLTAGES
MONITOR
CBOOT
CHARGE
SS_INH
2
INHIBIT
SOFTSTART
3.3V
COMP
FB
7
8
E/A
INTERNAL
REFERENCE
INTERNAL
SUPPLY
5.1V
6
PWM
BOOT
R
S
3.3V
Q
DRIVE
OSCILLATOR
1
GND
CBOOT
CHARGE
AT LIGHT
LOADS
3
OSC
4
OUT
D97IN594
Figure 3. Pins Connection
(Top view)
N.C.
GND
GND
SS_INH
OSC
OUT
1
2
3
4
D97IN595
1
2
3
4
5
6
7
8
D97IN596
16
15
14
13
12
11
10
9
N.C.
N.C.
FB
COMP
BOOT
VCC
N.C.
N.C.
8
7
6
5
FB
COMP
BOOT
VCC
SS_INH
OSC
OUT
OUT
N.C.
N.C.
DIP-8
SO16W
Table 3. Pin Description
N°
1
2
Pin
2
3
Name
GND
SS_INH
Ground
A logic signal (active low) disables the device (sleep mode operation).
A capacitor connected between this pin and ground determines the soft start time.
When this pin is grounded disables the device (driven by open collector/drain).
An external resistor connected between the unregulated input voltage and this pin
and a capacitor connected from this pin to ground fix the switching frequency. (Line
feed forward is automatically obtained)
Function
3
4
OSC
2/13
STMICROELECTRONICS [ STMICROELECTRONICS ]
