Pinout and pin description
STM8S105xx
5.1
STM8S105 pinouts and pin description
Figure 3: LQFP 48-pin pinout
PD2 (HS)/TIM3_CH1 [TIM2_CH3]
PD1 (HS)/SWIM
PD0 (HS)/TIM3_CH2 [
TIM1_BKIN] [CLK_CCO]
PD7/TLI [TIM1_CH4]
PD6/UART2_RX
PD5/UART2_TX
PD4 (HS)/TIM2_CH1 [BEEP]
PD3 (HS)/TIM2_CH2 [ADC_ETR]
NRST
OSCIN/PA1
OSCOUT/PA2
V SSIO_1
VSS
VCAP
VDD
1
2
3
4
5
6
7
8
9
10
11
12
48 47 46 45 44 43 42 41 40 39 38 37
36
35
34
33
32
31
30
29
28
27
26
25
PE0
(HS)
/CLK_CCO
2
PE1 (T)/I C_SCL
2
PE2 (T)/I C_SDA
PE3/TIM1_BKIN
PG1
PG0
VDDIO_1
[TIM3_CH1] TIM2_CH3/PA3
(HS)
PA4
(HS)
PA5
(HS) PA6
PC7
(HS)
/SPI_MISO
PC6
(HS)
/SPI_MOSI
VDDIO_2
VSSIO_2
PC5
(HS)
/SPI_SCK
PC4 (HS)/TIM1_CH4
PC3 (HS)/TIM1_CH3
P
C2 (HS)/TIM1_CH2
PC1 (HS)/TIM1_CH1/UART2_CK
PE5/SPI_NSS
13 14 15 16 17 18 19 20 21 22 23 24
AIN6/PB6
2
[I C_SDA] AIN5/PB5
2
[I C_SCL] AIN4/PB4
[TIM1_ETR/AIN3/PB3
[TIM1_CH3N] AIN2/PB2
[TIM1_CH2N] AIN1/PB1
[TIM1_CH1N] AIN0/PB0
VDDA
VSSA
AIN7/PB7
AIN8/PE7
1.
(HS) high sink capability.
2.
(T) True open drain (P-buffer and protection diode to V
DD
not implemented).
3.
[ ] alternate function remapping option (If the same alternate function is shown twice, it
indicates an exclusive choice not a duplication of the function).
22/127
DocID14771 Rev 9
AIN9/PE6