Pinout and pin description
Figure 5: LQFP/VFQFPN/UFQFPN 32-pin pinout
STM8S105xx
32 31 30 29 28 27 26 25
NRST
OSCIN/PA1
OSCOUT/PA2
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
V DDA
24
23
22
21
20
19
18
17
PC7 (HS)/SPI_MISO
PC6 (HS)/SPI_MOSI
PC5 (HS)/SPI_SCK
PC4 (HS)/TIM1_CH4
PC3 (HS)/TIM1_CH3
PC2 (HS)/TIM1_CH2
V SS
VCAP
V DD
V DDIO
AIN12/PF4
PD0 (HS)/TIM3_CH2 [TIM1_BKIN] [CLK_CCO]
PD3 (HS)/TIM2_CH2 [ADC_ETR]
PD2 (HS)/TIM3_CH1[TIM2_CH3]
PD4 (HS)/TIM2_CH1 [BEEP]
PD7/TLI [
TIM1_CH4]
PD6/UART
2
_RX
PD5/UART
2
_TX
PD1 (HS)/SWIM
PC1 (HS)/TIM1_CH1/UART2_CK
PE5/SPI_NSS
VSSA
[TIM1_ETR] AIN3/PB3
[TIM1_CH3N] AIN2/PB2
2
[I C_SDA] AIN5/PB5
2
[I C_SCL] AIN4/PB4
[TIM1_CH2N] AIN1/PB1
1.
(HS) high sink capability.
2.
[ ] alternate function remapping option (If the same alternate function is shown twice, it
indicates an exclusive choice not a duplication of the function).
24/127
DocID14771 Rev 9
[TIM1_CH1N] AIN0/PB0