Electrical characteristics
2
STM8S105xx
(1)
Figure 44: Typical application with I C bus and timing diagram
VDD
VDD
STM8S105xx
SDA
I²C bus
SCL
S TART REPEATED
S TART
tsu(STA)
SDA
tf(SDA)
th(STA)
SCL
tw(SCKH)
S TART
tr(SDA)
tw(SCKL)
tsu(SDA)
th(SDA)
S TOP
tsu(STA:STO)
tr(SCK)
tf(SCK)
tsu(STO)
ai15385
1.
Measurement points are made at CMOS levels: 0.3 x V
DD
and 0.7 x V
DD
10.3.11
10-bit ADC characteristics
Subject to general operating conditions for V
DDA
, f
MASTER
, and T
A
unless otherwise specified.
Table 45: ADC characteristics
Symbol Parameter
f
ADC
ADC clock frequency
Conditions
Min
Typ
Max
4
6
5.5
Unit
MHz
V
DDA
=2.95 to 5.5 V 1
V
DDA
=4.5 to 5.5 V
1
3
2.75
V
DDA
V
REF+
V
REF-
V
AIN
Analog supply
Positive reference voltage
Negative reference voltage
Conversion voltage range
V
V
V
V
V
DDA
0.5
V SSA
V SSA
V DDA
Devices with
external
V
REF+
/V
REF-
pins
C
ADC
Internal sample and hold
capacitor
V
REF-
V
REF+
V
3
pF
98/127
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