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SMH4044 参数 Datasheet PDF下载

SMH4044图片预览
型号: SMH4044
PDF下载: 下载PDF文件 查看货源
内容描述: 紧凑型PCI热插拔控制器,支持IPMI [Compact PCI Hot-Swap Controller With IPMI Support]
分类和应用: 控制器PC
文件页数/大小: 20 页 / 504 K
品牌: SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
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SMH4044
Preliminary
LOCAL_PCI_RST (29)
An open-drain (PFET) active-high output. It operates
together with with LOCAL_PCI_RST#, providing an ac-
tive high reset signal which is required by many 8051 style
MCUs. It is active whenever the card-side monitor inputs
are below their respective V
TRIP
levels. It may also be
driven active by a low input on the PCI_RST# pin.
SGNL_VLD# (20)
An open-drain, active-low output that indicates card side
power is valid and the internal card side PCI_RST# timer
has timed out.
VGATE3 (34)
A slew rate limited high side driver output for the 3.3V
external power FET gate. The output-voltage is generated
by an on-board charge pump.
VGATE5 (41)
A slew rate limited high side driver output for the 5V
external power FET gate. The output voltage is generated
by an on-board charge pump.
1V
REF
(2)
This output provides a 1V reference for pre-charging the
bus signal pins. Implementing a simple unity gain
amplifier circuit will allow pre-charging a large number of
pins.
MONITOR1, MONITOR2 (6, 30)
Voltage sensor inputs which will detect voltages and
compare them to the internal 1.25V reference. The
sensors can be independently configured to sense over
voltage or under voltage and can be used as either Host
side voltage sensors or Card side voltage sensors.
CS# (32)
An active low Chip Select input. This signal must be
asserted during I
2
C communications. The CS# signal
allows external decoding to be used to extend the number
of SMH4044 devices on the same serial bus from 8 —
using the Address inputs — to an unlimited number. Bus
Capacitive and Resistance loading must be considered
when using multiple I
2
C devices on the same bus. Please
refer to generic I
2
C documentation ("Bus Interface") in
this Data Sheet for further information.
ABSOLUTE MAXIMUM RATINGS*
Temperature Under Bias ...................... –55°C to 125°C
Storage Temperature ........................... –65°C to 150°C
Lead Solder Temperature (10 secs) .................. 300 °C
Terminal Voltage with Respect to GND:
V
0
, V
1
, V
2
, and V
3
.......... –0.3V to 6.0V
All Others ...................... –0.3V to 6.0V
*COMMENT
Stresses listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions
outside those listed in the operational sections of this specification is not
implied. Exposure to any absolute maximum rating for extended
periods may affect device performance and reliability.
RECOMMENDED OPERATING CONDITIONS
Temperature
Voltage
–40ºC to 85ºC.
2.7V to 5.5V
SUMMIT MICROELECTRONICS, Inc.
2057 1.x 8/16/01
7