SMH4812
Preliminary
FUNCTIONAL DESCRIPTION
GENERAL OPERATION
The SMH4812 is an integrated power controller for hot
swappable add-in cards. The device operates from a wide
supply range and generates the signals necessary to drive
an isolated output DC/DC converter. As a typical add-in
board is inserted into the powered backplane physical
connections must first be made with the chassis to dis-
charge any electrostatic voltage potentials. The board
then contacts the long pins on the backplane that provide
power and ground. As soon as power is applied the device
starts up, but does not immediately apply power to the
output load. Under-voltage and over-voltage circuits
inside the controller check to see that the input voltage is
within a user-specified range, and pin detection signals
determine whether the card is seated properly.
These requirements must be met for a Pin Detect Delay
period of t
PDD
, after which time the hot-swap controller
enables VGATE to turn on the external power MOSFET
switch. The VGATE output is current limited to I
VGATE
,
allowing the slew rate to be easily modified using external
passive components. During the controlled turn-on period
the V
DS
of the MOSFET is monitored by the drain sense
input. When drain sense drops below 2.5V, and VGATE
gets above V
DD
– V
GT
, the power good output can begin
turning on the DC/DC controller. The Power Good Enable
input may be used to activate or deactivate the output load.
Steady state operation is maintained as long as all condi-
tions are normal. Any of the following events may cause
the device to disable the DC/DC controller by shutting
down the power MOSFET: an under-voltage or over-
voltage condition on the host power supply; an over-
current event detected on the CBSENSE input; a failure of
the power MOSFET sensed via the DRAIN SENSE pin;
the pin detect signals becoming invalid; the master enable
(EN/TS) falling below 2.5V; the FS# input being driven low
by events on the secondary side of the DC/DC controller.
The SMH4812 may be configured so that after any of
these events occur the VGATE output shuts off and either
latches into an off state or recycles power after a cooling
down period, t
CYC
.
Powering V
DD
The SMH4812 contains a shunt regulator on the V
DD
pin
that prevents the voltage from exceeding 12V. It is
necessary to use a dropper resistor (R
D
) between the host
power supply and the V
DD
pin in order to limit current into
the device and prevent possible damage. The dropper
resistor allows the device to operate across a wide range
of system supply voltages, and also helps protect the
device against common-mode power surges. Refer to the
Applications Section for help on calculating the R
D
resis-
tance value.
System Enables
There are several enabling inputs, which allow a host
system to control the SMH4812. The Pin Detect pins
(PD1# & PD2#) are two active low enables that are
generally used to indicate that the add-in circuit card is
properly seated. This is typically done by clamping the
inputs to V
SS
through the implementation of an injector
switch, or alternatively through the use of a staggered pins
at the card-cage interface. Two shorter pins arrayed at
opposite ends of the connector force the card to be fully
seated (not canted) before both pin detects are enabled.
Care must be taken not to exceed the maximum voltage
rating of these pins during the insertion process. Refer to
details in the Applications Section for proper circuit imple-
mentation.
The EN/TS input provides an active high comparator input
that may be used as a master enable or temperature
sense input. These inputs must be held low for a period of
t
PDD
before a power-up sequence may be initiated.
Under-/Over-Voltage Sensing
The Under-Voltage (UV) and Over-Voltage (OV) inputs
provide a set of comparators that act in conjunction with an
external resistive divider ladder to sense when the host
supply voltage exceeds the user defined limits. If the input
to the UV pin rises above 2.5V, or the input to the OV pin
falls below 2.5V for a period of t
PDD
, the power-up se-
quence may be initiated. The t
PDD
filter helps prevent
spurious start-up sequences while the card is being in-
serted. If UV falls below 2.5V or OV rises above 2.5V, the
PG and VGATE outputs will be shut down immediately.
Under-/Over-Voltage Filtering
The SMH4812 may also be configured so that an out of
tolerance condition on UV/OV will not shut off the output
immediately. Instead, a filter delay may be inserted so that
only sustained under-voltage or over-voltage conditions
will shut off the output. When the UV/OV filter option is
enabled an out of tolerance condition on UV/OV for longer
than the filter delay time, t
UOFLTR
, activates the FAULT#
output, and the VGATE and PG outputs will be latched in
the off state. See Figure 1. To initiate another power-up
sequence the FAULT# output must first be reset. Refer to
the appropriate section on resetting the FAULT# output.
The Under-/Over-Voltage Filtering feature is disabled in
the default configuration of the device.
SUMMIT MICROELECTRONICS, Inc.
2055 4.1 03/27/09
7
SUMMIT [ SUMMIT MICROELECTRONICS, INC. ]
