SM39R08A5
8-Bit Micro-controller
with 8KB Flash
& 256B RAM embedded
6.2. Timer/counter control register (TCON)
Mnemonic: TCON
7
6
5
TF1
TR1
TF0
4
TR0
3
IE1
2
IT1
1
IE0
Address: 88h
0
Reset
IT0
00h
TF1: Timer 1 overflow flag set by hardware when Timer 1 overflows. This flag can
be cleared by software and is automatically cleared when interrupt is
processed.
TR1: Timer 1 Run control bit. If cleared, Timer 1 stops.
TF0: Timer 0 overflow flag set by hardware when Timer 0 overflows. This flag can
be cleared by software and is automatically cleared when interrupt is
processed.
TR0: Timer 0 Run control bit. If cleared, Timer 0 stops.
IE1: Interrupt 1 edge flag. Set by hardware, when falling edge on external pin INT1
is observed. Cleared when interrupt is processed.
IT1: Interrupt 1 type control bit. Selects falling edge or low level on input pin to
cause interrupt.
IE0: Interrupt 0 edge flag. Set by hardware, when falling edge on external pin INT0
is observed. Cleared when interrupt is processed.
IT0: Interrupt 0 type control bit. Selects falling edge or low level on input pin to
cause interrupt.
6.3. T0、T1 signal swapping
The T0、T1 signal can be configured to other I/O.
Mnemonic: AUX
7
6
BRGS
-
PTS [1:0]
0x00
0x01
0x10
0x11
Address: 91h
0
Reset
DPS
00H
5
-
4
3
PTS [1:0]
T0
-
P3.3(PA03)
P3.0(PA00)
-
2
1
PINTS[1:0]
T1
-
P3.2(PA02)
P3.1(PA01)
-
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M067
Ver B SM39R08A5 04/22/2013
- 24 -
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
