SM5964B
8-Bit Micro-controller
64KB with ISP Flash
& 1KB RAM embedded
7.
Timer 2
Timer2 is a 16-bit timer/counter which can operate as either an event timer or an event counter as selected by C/T2
in the special function register T2CON.
Mnemonic
TL2
TH2
RCAP2L
Description
Timer 2 , low
byte
Timer 2 , high
byte
Reload and
capture data low
byte
Reload and
capture data
high byte
Timer 2 Mode
Timer 2 Control
Register
Dir.
CCh
CDh
CAh
Bit 7
Bit 6
Bit 5
Timer 2
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
RST
00h
00h
00h
TL2[7:0]
TH2[7:0]
RCAP2L[7:0]
RCAP2H
T2MOD
T2CON
CBh
C9h
C8h
-
TF2
-
EXF2
-
RCLK
RCAP2H[7:0]
-
TCLK
-
EXEN
2
-
TR2
T2OE
C/
T2
DCEN
CP/
00h
00h
00h
RL2
Mnemonic: T2MOD
7
6
5
-
-
-
4
-
3
-
2
-
1
T2OE
Address: 98h
0
Reset
DCEN
00H
T2OE: Timer 2 Output Enable bit. It enables Timer 2 overflow rate to toggle P1.0.
DCEN: Down Count Enable bit. When set, this allows Timer 2 to be configured as an up/down
Counter.
Mnemonic: T2CON
7
6
5
TF2
EXF2
RCLK
Address: 98h
0
Reset
CP/
00H
4
TCLK
3
EXEN2
2
TR2
1
C/
T2
RL2
TF2: Timer 2 overflow flag is set by a Timer 2 overflow and must be cleared by software. TF2
will not be set when either RCLK = 1 or TCLK = 1.
EXF2: Timer 2 external flag is set when either a capture or reload is caused by a negative
transition on T2EX and EXEN2 = 1. When Timer 2 interrupt is enabled, EXF2 = 1 will
cause the CPU to vector to the Timer 2 interrupt routine. EXF2 must be cleared by
software. EXF2 does not cause an interrupt in up/down counter mode (DCEN = 1).
RCLK: Receive clock enable. When set, causes the serial port to use Timer 2 overflow pluses
for it’s receive clock in serial port Modes 1 and 3. RCLK = 0 causes Timer 1 overflows to
be used for the receive clock.
TCLK: Transmit clock enable. When set, causes the serial port to use Timer 2 overflow pulses
for it’s transmit clock in serial port Modes 1 and 3. TCLK = 0 causes Timer 1 overflows to
be used for the transmit clock.
Specifications subject to change without notice contact your sales representatives for the most recent information.
ISSFD-M081
Ver A SM5964B 3/7/2014
- 29 -
SYNCMOS [ SYNCMOS TECHNOLOGIES,INC ]
