Technical Specification
Usually the converter has an EMI filter upstream of it, and the
source voltage is connected to the input of this EMI filter. When,
during compliance testing, the source voltage goes low during
an under-voltage transient, the input to the converter will go even
lower. This is because the inductance of the EMI filter (as well
as the parasitic source inductance) will cause an oscillatory ring
with the bulk capacitor. With the bulk capacitor that is present
in an MQME-28 filter, the peak of this under-voltage ring may
be approximately 2 volts if the source voltage drops to 6V (it
will be smaller than this at a higher transient source voltage
due to the lower current drawn by the converter). As a result, it
is necessary to add extra bulk capacitor across the converter’s
input pins if the source voltage is going to drop to 6V, as it does
for MIL-STD-704(A) or MIL-STD 1275B. It is recommended that a
100µF/0.25W ESR capacitor be connected across the input pins
of the converter be used as a starting point. For MIL-STD-704(B-F),
where the source voltage drops to only 7V, a 47µF hold-up
capacitor would be a good starting point. The exact amount of
capacitance required depends on the application (source induc-
tance, load power, rate of fall of the source voltage, etc). Please
consult the factory if further assistance is required.
MQFL-28VE-06S
Output:
6V
Current:
17A
when the converter is inhibited through the ENA1 pin, the bias
supply is also turned off, whereas this supply remains on when
the converter is inhibited through the ENA2 pin. A higher input
standby current therefore results in the latter case.
Both enable pins are internally pulled high so that an open
connection on both pins will enable the converter. Figure A
shows the equivalent circuit looking into either enable pins. It is
TTL compatible.
5.6V
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PIN 4
(or PIN 12)
1N4148
82K
ENABLE
250K
2N3904
125K
TO ENABLE
CIRCUITRY
Because input system stability is harder to maintain as the input
voltage gets lower, the MQFL-28VE series converters are designed
to give external access to the voltage node between the boost-con-
verter and the pre-regulator stages. This access, at the “STABILITY”
pin (pin 3), permits the user to add a stabilizing bulk capacitor
with series resistance to this node. Since the voltage at this node
stays above 16V, the amount of capacitance required is much
less than would be required on the converter’s input pins where
the voltage might drop as low as 5.5V. It is recommended that a
22µF capacitor with an ESR of about 1W be connected between
the STABILITY pin and the INPUT RETURN pin (pin 2). Without this
special connection to the internal node of the converter, a 300µF
stabilizing bulk capacitor would have been required across the
converter’s input pins.
Another advantage of the STABILITY pin is that it provides a volt-
age source that stays above 16V when the under-voltage transient
occurs. This voltage source might be useful for other circuitry in
the system.
PIN 2
(or PIN 8)
IN RTN
Figure A:
Equivalent circuit looking into either the ENA1 or ENA2
pins with respect to its corresponding return pin.
SHUT DOWN:
The MQFL converter will shut down in response
to only four conditions: ENA1 input low, ENA2 input low, VIN
input below under-voltage lockout threshold, or VIN input above
over-voltage shutdown threshold. Following a shutdown event,
there is a startup inhibit delay which will prevent the converter
from restarting for approximately 300ms. After the 300ms delay
elapses, if the enable inputs are high and the input voltage is
within the operating range, the converter will restart. If the VIN
input is brought down to nearly 0V and back into the operating
range, there is no startup inhibit, and the output voltage will rise
according to the “Turn-On Delay, Rising Vin” specification.
REMOTE SENSE:
The purpose of the remote sense pins is to
correct for the voltage drop along the conductors that connect the
converter’s output to the load. To achieve this goal, a separate
conductor should be used to connect the +SENSE pin (pin 10)
directly to the positive terminal of the load, as shown in the
connection diagram. Similarly, the –SENSE pin (pin 9) should be
connected through a separate conductor to the return terminal of
the load.
NOTE: Even if remote sensing of the load voltage is not desired,
the +SENSE and the -SENSE pins must be connected to +Vout
(pin 7) and OUTPUT RETURN (pin 8), respectively, to get proper
regulation of the converter’s output. If they are left open, the
converter will have an output voltage that is approximately 200mV
higher than its specified value. If only the +SENSE pin is left
open, the output voltage will be approximately 25mV too high.
Doc.# 005-0005209 Rev. 1
04/22/09
Page 11
CONTROL FEATURES
ENABLE:
The MQFL converter has two enable pins. Both must
have a logic high level for the converter to be enabled. A logic
low on either pin will inhibit the converter.
The ENA1 pin (pin 4) is referenced with respect to the converter’s
input return (pin 2). The ENA2 pin (pin 12) is referenced with
respect to the converter’s output return (pin 8). This permits the
converter to be inhibited from either the input or the output side.
Regardless of which pin is used to inhibit the converter, the
regulation and the isolation stages are turned off. However,
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