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CC1110F8RSP 参数 Datasheet PDF下载

CC1110F8RSP图片预览
型号: CC1110F8RSP
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗低于1 GHz的射频系统级芯片(SoC )与MCU,存储器,收发器和USB控制器 [Low-power sub-1 GHz RF System-on-Chip (SoC) with MCU, memory, transceiver, and USB controller]
分类和应用: 存储电信集成电路射频控制器PC
文件页数/大小: 240 页 / 2823 K
品牌: TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
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CC1110Fx / CC1111Fx
Figure 17: Debug Interface Timing Diagram
12.3 Debug Lock Bit
For software and/or access protection, a set of
lock bits can be written. This information is
contained in the Flash Information Page (see
section 11.2.3.2), at location 0x000. The Flash
Information Page can only be accessed
through the debug interface. There are three
kinds of lock protect bits as described in this
section.
The lock size bits
LSIZE[2:0]
are used to
define which section of the flash memory
should be write protected, if any. The size of
the write protected area can be set to 0 (no
pages), 1, 2, 4, 8, 16, 24, or 32 KB (all pages),
starting from top of flash memory and defining
a section below this. Note that for
CC1110F8
,
CC1111F8
,
CC1110F16
, and
CC1111F16
, the only
supported value for
LSIZE[2:0]is
0 and 7
(all or no pages respectively).
The second type of lock protect bits is
BBLOCK,
which is used to lock the boot sector
page (page 0 ranging from address 0x0000 to
0x03FF). When
BBLOCK
is set to 0, the boot
sector page is locked.
The third type of lock protect bit is
DBGLOCK,
which is used to disable hardware debug
support through the Debug Interface. When
DBGLOCK
is set to 0, almost all debug
commands are disabled.
When the Debug Lock bit,
DBGLOCK,
is set to
0 (see Table 44) all debug commands except
and
function. The status of the Debug Lock bit can
be read using the READ_STATUS command
(see section 12.4.2).
Note that after the Debug Lock bit has
changed due to a Flash Information Page write
or a flash mass erase, a HALT, RESUME,
or
so that the Debug Lock value returned by
Lock value. For example a dummy NOP
The Debug Lock bit will also be updated after
a device reset so an alternative is to reset the
chip and reenter debug mode.
The CHIP_ERASE command will set all bits in
flash memory to 1. This means that after
issuing a CHIP_ERASE command the boot
sector will be writable, no pages will be write-
protected, and all debug commands are
enabled.
The lock protect bits are written as a normal
flash write to
(see section 13.3.2), but
the Debug Interface needs to select the Flash
Information Page first instead of the Flash
Main Page which is the default setting. The
Information Page is selected through the
Debug Configuration which is written through
the Debug Interface only. Refer to section
Flash Information Page is selected using the
Debug Interface.
lock protection bits. Note that this is not an
SFR, but instead the byte stored at location
0x000 in Flash Information Page.
SWRS033E
Page 72 of 239