C2510Fx / CC2511Fx
7.10 7-12 bit ADC
T
A
= 25
°C,
VDD = 3.0V if nothing else stated. The numbers given here are based on tests performed
in accordance with IEEE Std 1241-2000 [7]. The ADC data are from
CC2430
characterization. As the
CC2510x/C2511Fx
uses the same ADC, the numbers listed in Table 18 should be good indicators of the
performance to be expected from
CC2510x
and
CC2511x
. Note that these numbers will apply for 24 MHz
operated systems (like
CC2510x
using a 24 MHz crystal or
CC2511x
using a 48 MHz crystal).
Performance will be slightly different for other crystal frequencies (e.g. 26 MHz and 27 MHz).
Parameter
Input voltage
External reference voltage
External reference voltage
differential
Input resistance, signal
Full-Scale Signal
ENOB
4
Min
0
0
0
Typ
Max
AVDD
AVDD
AVDD
Unit
V
V
V
kΩ
V
bits
Condition/Note
AVDD is voltage on AVDD pin
AVDD is voltage on AVDD pin
AVDD is voltage on AVDD pin
Simulated using 4 MHz clock speed (see Section
Peak-to-peak, defines 0 dBFS
7-bits setting
9-bits setting
10-bits setting
12-bits setting
197
2.97
5.7
7.5
9.3
10.8
Single ended input
ENOB
6.5
8.3
10.0
11.5
bits
7-bits setting
9-bits setting
10-bits setting
12-bits setting
Differential input
Useful Power Bandwidth
THD
0-20
kHz
7-bits setting, both single and differential
-Single ended input
-Differential input
Signal To Non-Harmonic Ratio
-Single ended input
-Differential input
Spurious Free Dynamic Range
-Single ended input
-Differential input
CMRR, differential input
Crosstalk, single ended input
Offset
Gain error
DNL
-75.2
-86.6
dB
dB
12-bits setting, -6 dBFS
12-bits setting, -6 dBFS
70.2
79.3
dB
dB
12-bits setting
12-bits setting
78.8
88.9
<-84
<-84
-3
0.68
0.05
0.9
dB
dB
dB
dB
mV
%
LSB
LSB
LSB
LSB
dB
12-bits setting, -6 dBFS
12-bits setting, -6 dBFS
12- bit setting, 1 kHz Sine (0 dBFS), limited by ADC
resolution
12- bit setting, 1 kHz Sine (0 dBFS), limited by ADC
resolution
Mid. Scale
12-bits setting, mean
12-bits setting, max
12-bits setting, mean
12-bits setting, max
7-bits setting
INL
4.6
13.3
SINAD
4
35.4
Measured with 300 Hz Sine input and VDD as reference.
SWRS055D
Page 20 of 243
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