C2510Fx / CC2511Fx
13.11 Random Number Generator
13.11.1
Introduction
generator
has
the
The random number generator is a 16-bit
Linear Feedback Shift Register (LFSR) with
polynomial
X
+
X
+
X
+
1
(i.e. CRC16).
It uses different levels of unrolling depending
on the operation it performs. The basic version
(no unrolling) is shown below.
16
15
2
The random number
following features.
•
Generate pseudo-random bytes which
can be read by the CPU.
•
Calculate CRC16 of bytes that are
written to
RNDH.
•
Seeded by value written to
RNDL.
The random number generator is turned off
when
15
+
14
13
12
11
10
9
8
7
6
5
4
3
2
+
1
0
in_bit
+
Figure 39: Basic Structure of the Random Number Generator
13.11.2
Random
Operation
Number
Generator
replaced with the new data byte that was
written to
13.11.2.3 CRC16
The LFSR can also be used to calculate the
CRC value of a sequence of bytes. Writing to
the
register will trigger a CRC
calculation. The new byte is processed from
the MSB end and an 8x unrolling is used, so
that a new byte can be written to
every
clock cycle.
Note that the LFSR must be properly seeded
by writing to
RNDL,
before the CRC
calculations start. Usually the seed value
should be 0x0000 or 0xFFFF. Using 0xFFFF
as seed value will give the CRC used by the
radio.
For the following byte sequence:
0x03, 0x41, 0x42, 0x43
The CRC will be 0xB4BC when using 0xFFFF
as seed value.
13.11.3
Registers
The operation of the random number generator
is controlled by the
bits. The
current value of the 16-bit shift register in the
LFSR can be read from the
and
RNDL
registers.
13.11.2.1 Semi Random Sequence
Generation
The default operation (ADCCON1.RCTRL=00)
is to clock the LSFR once (13x unrolling) thus
give a new pseudo-random byte from LSB of
the LSFR each time the
register is read.
Another way is to update the LFSR is to set
This will clock the LFSR
once (no unrolling) and the
bits will automatically be cleared when the
operation has completed.
13.11.2.2 Seeding
The LFSR can be seeded by writing to the
register twice. Each time the
RNDL
register is written, the 8 LSB of the LFSR is
copied to the 8 MSB and the 8 LSBs are
The random number generator registers are
described in this section.
SWRS055D
Page 146 of 243
TAOS [ TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS ]
