C2510Fx / CC2511Fx
U0CSR (0x86) – USART 0 Control and Status
Bit
Name
Reset
R/W
Description
7
MODE
0
R/W
USART 0 mode select
0
1
SPI mode
UART mode
6
5
4
RE
0
0
0
R/W
R/W
R/W0
UART 0 receiver enable
0
1
Receiver disabled
Receiver enabled
SLAVE
FE
SPI 0 master or slave mode select
0
1
SPI master
SPI slave
UART 0 framing error status
0
1
No framing error detected
Byte received with incorrect stop bit level
Note: TCON.URX0IF and U0CSR.RX_BYTEbit will be asserted when
the first stop bit is checked OK, meaning that if two stop bits are sent and
the second stop bit is not OK, this bit is asserted 1 bit duration later than
the 2 other above mentioned bits.
3
2
1
0
ERR
0
0
0
0
R/W0
R/W0
R/W0
R
UART 0 parity error status
0
1
No parity error detected
Byte received with parity error
RX_BYTE
TX_BYTE
ACTIVE
Receive byte status
0
1
No byte received
Received byte ready
Transmit byte status
0
1
Byte not transmitted
Last byte written to Data Buffer register transmitted
USART 0 transmit/receive active status
0
1
USART 0 idle
USART 0 busy in transmit or receive mode
SWRS055D
Page 157 of 243
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