C2510Fx / CC2511Fx
For SPI slave mode the maximum baud rate is
always F/8.
UxBAUD.BAUD_M[7:0]=0).
mode does not need to receive data, the
If SPI master
maximum
(UxGCR.BAUD_E[4:0]=19
UxBAUD.BAUD_M[7:0]=0). Setting higher
baud rates than this will give erroneous results.
SPI
rate
is
F/2
and
Note that the baud rate must be configured
before any other UART or SPI operations take
place (the baud rate should never be changed
when UxCSR.ACTIVEis asserted).
Baud rate [bps]
2400
UxBAUD.BAUD_M UxGCR.BAUD_E Error (%)
131
131
131
34
6
0.04
0.04
0.04
0.13
0.04
0.13
0.04
0.13
0.04
0.13
0.13
4800
7
9600
8
14400
9
19200
131
34
9
28800
10
10
11
11
12
13
38400
131
34
57600
76800
131
34
115200
230400
34
Table 55: Commonly used Baud Rate Settings for 26 MHz System Clock
Baud rate [bps]
2400
UxBAUD.BAUD_M UxGCR.BAUD_E Error (%)
163
163
163
59
6
0.08
0.08
0.09
0.13
0.10
0.14
0.10
0.14
0.10
0.14
0.14
4800
7
9600
8
14400
9
19200
163
59
9
28800
10
10
11
11
12
13
38400
163
59
57600
76800
163
59
115200
230400
59
Table 56: Commonly used Baud Rate Settings for 24 MHz System Clock
13.14.4
USART Flushing
13.14.5
USART Interrupts
The current operation can be aborted
(operation stopped and all data buffers
Each USART has two interrupts. These are the
USART RX complete interrupt
(TCON.URXxIF) and the USART TX
complete interrupt (IRCON2.UTXxIF). The
interrupts are enabled by setting
IEN0.URXxIE=1 and IEN2.UTXxIE=1,
x
cleared)
by
setting
x
UxUCR.FLUSH=1.Asserting the FLUSH bit
should either be aligned with USART interrupts
or a wait time of one bit duration (at current
baud rate) should be added after setting the bit
to 1 before accessing the USART registers.
respectively. Please see the previous sections
on how the interrupt flags are asserted in the
different modes of operation (UART RX, UART
TX, SPI master, and SPI Slave).
SWRS055D
Page 155 of 243
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