1.5A DUAL OPEN-DRAIN
MOSFET DRIVERS
TC4404
TC4405
thus minimizing chip count. Unused open drains should be
returned to the supply rail that their device sources are
connected to (pull-downs to ground, pull-ups to V
DD
), to
prevent static damage. In addition, in situations where
timing resistors or other means of limiting crossover currents
are used, like drains may be paralleled for greater current
carrying capacity.
These devices are built to operate in the most de-
manding electrical environments. They will not latch up
under any conditions within their power and voltage rat-
ings; they are not subject to damage when up to 5V of
noise spiking of either polarity occurs on their ground pin;
and they can accept, without damage or logic upset, up to
1/2 amp of reverse current (of either polarity) being forced
back into their outputs. All terminals are fully protected
against up to 2 kV of electrostatic discharge.
Package Thermal Resistance
CerDIP R
θJ-A
............................................... 150°C/W
CerDIP R
θJ-C
................................................. 55°C/W
PDIP R
θJ-A
.................................................. 125°C/W
PDIP R
θJ-C
.................................................... 45°C/W
SOIC R
θJ-A
.................................................. 155°C/W
SOIC R
θJ-C
.................................................... 45°C/W
Operating Temperature Range
C Version ............................................... 0°C to +70°C
E Version .......................................... – 40°C to +85°C
M Version ....................................... – 55°C to +125°C
Package Power Dissipation (T
A
≤
70°C)
Plastic ............................................................. 730mW
CerDP ............................................................. 800mW
SOIC ............................................................... 470mW
*Static-sensitive device. Unused devices must be stored in conductive
material. Protect devices from static discharge and static fields. Stresses
above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. These are stress ratings only and functional
operation of the device at these or any other conditions above those
indicated in the operational sections of the specifications is not implied.
Exposure to Absolute Maximum Rating Conditions for extended periods
may affect device reliability.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage ......................................................... +22V
Maximum Chip Temperature ................................. +150°C
Storage Temperature Range ................ – 65°C to +150°C
Lead Temperature (Soldering, 10 sec) ................. +300°C
ELECTRICAL CHARACTERISTICS:
Symbol
Input
V
IH
V
IL
I
IN
Logic 1 High Input Voltage
Logic 0 Low Input Voltage
Input Current
Specifications measured at T
A
= +25°C with 4.5V
≤
V
DD
≤
18V, unless otherwise specified.
Parameter
Test Conditions
Min
2.4
—
–1
V
DD
– 0.025
—
—
—
—
> 500
Typ
—
—
—
—
—
7
1.5
—
—
Max
—
0.8
1
—
0.025
10
—
100
—
Unit
V
V
µA
V
V
Ω
A
mA
mA
– 0V
≤
V
IN
≤
V
DD
Output
V
OH
V
OL
R
O
I
PK
I
DC
I
R
High Output Voltage
Low Output Voltage
Output Resistance
I
OUT
= 10 mA, V
DD
= 18V; Any Drain
Peak Output Current (Any Drain) Duty cycle < 2%, t
≤
300µsec
Continuous Output Current (Any Drain)
Latch-Up Protection (Any Drain) Duty cycle < 2%, t
≤
300µsec
Withstand Reverse Current
Rise Time
Fall Time
Delay Time
Delay Time
Power Supply Current
1. Switching times guaranteed by design.
Switching Time (Note 1)
t
R
t
F
t
D1
t
D2
I
S
NOTE:
Figure 1, C
L
= 1000 pF
Figure 1, C
L
= 1000 pF
Figure 1, C
L
= 1000 pF
Figure 1, C
L
= 1000 pF
V
IN
= 3V (Both Inputs)
V
IN
= 0V (Both Inputs)
—
—
—
—
—
—
25
25
15
32
—
—
30
30
30
50
4.5
0.4
nsec
nsec
nsec
nsec
mA
Power Supply
4-220
TELCOM SEMICONDUCTOR, INC.
TELCOM [ TELCOM SEMICONDUCTOR, INC ]
