3-1/2 DIGIT A/D CONVERTERS
TC7106
TC7106A
TC7107
TC7107A
When the TEST pin on the TC7106A is pulled to V
+
, all
segments are turned “ON.” The display reads –1888. During
this mode the LCD segments have a constant DC voltage
impressed. DO NOT LEAVE THE DISPLAY IN THIS MODE
FOR MORE THAN SEVERAL MINUTES! LCD displays
may be destroyed if operated with DC levels for extended
periods.
The display font and the segment drive assignment are
shown in Figure 4.
DISPLAY FONT
1
•
Signal Integrate: 1000 Counts
(4000 Clock Pulses)
This time period is fixed. The integration period is:
T
SI
= 4000
2
3
4
5
[ ]
1
f
OSC
Where f
OSC
is the externally set clock frequency.
•
Reference Integrate: 0 to 2000 Counts
(0 to 8000 Clock Pulses)
The TC7106A/7107A are drop-in replacements for the
7106/7107 parts. External component value changes are
not required to benefit from the low drift internal reference.
1000's
100's
10's
1's
Clock Circuit
Three clocking methods may be used:
1. An external oscillator connected to pin 40.
2. A crystal between pins 39 and 40.
3. An R-C oscillator using all three pins.
Figure 4. Display Font and Segment Assignment
In the TC7106A, an internal digital ground is generated
from a 6 volt zener diode and a large P channel source
follower. This supply is made stiff to absorb the large
capacitive currents when the backplane voltage is switched.
÷4
TO
COUNTER
40
CRYSTAL
39
38
DIGITAL SECTION (TC7107A)
Figure 5 shows the TC7107A. It is designed to drive
common anode LEDs. It is identical to the TC7106A except
that the regulated supply and backplane drive have been
eliminated and the segment drive is typically 8mA. The
1000's output (pin 19) sinks current from two LED segments,
and has a 16mA drive capability.
In both devices, the polarity indication is “ON” for nega-
–
+
tive analog inputs. If V
IN
and V
IN
are reversed, this indication
can be reversed also, if desired.
The display font is the same as the TC7106A.
EXT
OSC
RC NETWORK
TO TEST PIN ON TSC7106A
TO GND PIN ON TSC7107A
Figure 6. Clock Circuits
TC7106A
TC7107A
COMPONENT VALUE SELECTION
Auto-Zero Capacitor –
C
AZ
The C
AZ
capacitor size has some influence on system
noise. A 0.47µF capacitor is recommended for 200mV full-
scale applications where 1 LSB is 100µV. A 0.047µF capaci-
tor is adequate for 2.0V full-scale applications. A mylar
dielectric capacitor is adequate.
6
7
System Timing
The oscillator frequency is divided by 4 prior to clocking
the internal decade counters. The three-phase measure-
ment cycle takes a total of 4000 counts or 16000 clock
pulses. The 4000 count cycle is independent of input signal
magnitude.
Each phase of the measurement cycle has the following
length:
•
Auto-Zero Phase: 1000 to 3000 Counts
(4000 to 12000 Clock Pulses)
For signals less than full-scale, the auto-zero phase is
assigned the unused reference integrate time period.
TELCOM SEMICONDUCTOR, INC.
Reference Voltage Capacitor –
C
REF
The reference voltage used to ramp the integrator
output voltage back to zero during the reference-integrate
cycle is stored on C
REF
. A 0.1µF capacitor is acceptable
–
when V
IN
is tied to analog common. If a large common-mode
–
voltage exists (V
REF
≠
analog common) and the application
requires 200mV full-scale, increase C
REF
to 1.0
µF.
Rollover
error will be held to less than 1/2 count. A mylar dielectric
capacitor is adequate.
3-191
8
TELCOM [ TELCOM SEMICONDUCTOR, INC ]
