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U5020M 参数 Datasheet PDF下载

U5020M图片预览
型号: U5020M
PDF下载: 下载PDF文件 查看货源
内容描述: 数字窗口看门狗定时器 [Digital Window Watchdog Timer]
分类和应用:
文件页数/大小: 8 页 / 110 K
品牌: TEMIC [ TEMIC SEMICONDUCTORS ]
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U5020M
1000.00
100.00
t (
m
s)
4.5 V
5.0 V
5.5 V
C
1
= 500 pF
1.00
1
10
100
1000
95 10636
10.00
R
1
(k
W
)
Figure 3. Period t vs. R
1
, @ C
1
= 500 pF
Pin 13
V DD
Reset Out
t
o
t
1
t
6
Pin 10
Mode
Figure 4. Power-up reset and mode switchover
Pin 12
95 10637
Supply Voltage Monitoring, Pin 10
The integrated power-on reset (POR) circuitry sets the
internal logic to a defined basic status and generates a
reset pulse at the reset output, Pin 10, during ramp-up of
the supply voltage and in the case of voltage drops of the
supply. A hysteresis in the POR threshold prevents the
circuit from oscillating. During ramp–up of the supply
voltage the reset output stays active for time, t
o
, in order
to bring the microcontroller in its defined reset status (see
figure 4). Pin 10 has an open-drain output.
and the time, t
1
, starts again. Micro and watchdog are
synchronized with the switchover mode time, t
1
, each
time a reset pulse is generated.
Microcontroller in Active Mode
Monitoring with the “Short” Trigger
Window
After the switch-over mode the watchdog works in the
short watchdog mode and expects a trigger pulse from the
microcontroller within the defined time window, t
3
,
(enable time). The watchdog generates a reset pulse
which resets the microcontroller if
Switch-over Mode Time, Pin 12
The switch-over mode time enables the synchronous
operation of micro and watchdog. After the power-up
reset time the watchdog has to be switched to its
monitoring mode by the micro with a “low” signal
transmitted to the mode pin (Pin 12) within the time out
period, t
1
,. If the low signal does not occur within time,
t
1
, (see figure 4) the watchdog generates a reset pulse, t
6
,
D
the trigger pulse duration is too long,
D
the trigger pulse is within the disable time, t
2
D
there is no trigger pulse
Figure 5 shows the pulse diagram with a missing trigger
pulse.
TELEFUNKEN Semiconductors
Rev. A3, 27-Feb-97
3 (8)
Preliminary Information