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U5020M 参数 Datasheet PDF下载

U5020M图片预览
型号: U5020M
PDF下载: 下载PDF文件 查看货源
内容描述: 数字窗口看门狗定时器 [Digital Window Watchdog Timer]
分类和应用:
文件页数/大小: 8 页 / 110 K
品牌: TEMIC [ TEMIC SEMICONDUCTORS ]
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U5020M
V
DD
Reset Out
Pin 13
t
o
t
1
Pin 10
t
2
Mode
t
3
Pin 12
Pin 11
Trigger
Figure 5. Pulse diagram with no trigger pulse during the short watchdog time
95 10638
Figure 6 shows a correct trigger sequence. The positive
edge of the trigger signal starts a new monitoring cycle
with the disable time, t
2
. To ensure a correct operation of
the microcontroller the watchdog needs to be triggered
three times correctly before it sets its enable output. This
feature is used to activate or deactivate safety critical
components, which have to be switched to a certain
condition (emergency status) in the case of a micro-
controller malfunction. As soon as there is an incorrect
trigger sequence the enable signal is reset and it takes
again a three correct trigger sequence before enable is re-
set.
Microcontroller in Sleep Mode
Monitoring with the “Long” Trigger
Window
The long watchdog mode allows cyclical wake up of the
micro during the sleep mode. Like in the short watchdog
mode there is a disable time, t
4
, and an enable time, t
5
, in
which a trigger signal is accepted. The watchdog can be
switched from the short trigger window to the long trigger
window with a “high” potential at the mode pin (Pin 12).
In contrast to the short watchdog mode the time periods
are now much longer and the enable output remains
inactive that other components can be switched off to
effect a further decrease in current consumption. As soon
as a wake-up signal at one of the 6 wake up inputs (Pins
3 to 8) is detected, the long watchdog mode ends, a reset
pulse wakes-up the sleeping microcontroller and the
normal monitoring cycle starts with the mode switch-over
time.
With the help of a low or high potential at Pin 16 (time
switch) the long watchdog time can be selected in two
values.
VDD
Pin 13
t
0
Reset Out
t
1
Pin 10
t
3
t
2
t
2
Pin 12
Pin 11
Mode
Trigger
t
trig
Enable
95 10639
Pin 9
Figure 6. Pulse diagram of a correct trigger sequence during the short watchdog time
4 (8)
Preliminary Information
TELEFUNKEN Semiconductors
Rev. A3, 27-Feb-97