Data Sheet 71M6531D/F-71M6532D/F
Table 58: CE Pulse Generation Parameters
CE Ad-
dress
0x21
Name
WRATE
Default
827
Description
FDS 6531/6532 005
0x41
APULSEW
0
0x42
APULSER
0
0x43
APULSE2
0
0x44
APULSE3
0
0x38
PULSE
WIDTH
12
Kh = VMAX*IMAX*47.1132 / (In_8*WRATE*N
ACC
*X) Wh/pulse. The
default value results in a Kh of 1.0 Wh/pulse when 2520 samples
are taken in each accumulation interval (and VMAX=600,
IMAX = 442 [for 400µΩ shunt], In_8 = 1, X = 6).
Maximum value = 2
15
-1.
Watt pulse generator input (see
DIO_PW
bit). The output pulse
rate is:
APULSEW
* F
S
* 2
-32
*
WRATE
* X
* 2
-14
. This input is buf-
fered and can be loaded during a computation interval. The
change will take effect at the beginning of the next interval.
VAR pulse generator input (see
DIO_PV
bit). The output pulse rate
is:
APULSER
* F
S
*2
-32
*
WRATE
* X
* 2
-14
. This input is buffered and
can be loaded during a computation interval. The change will take
effect at the beginning of the next interval.
Third pulse generator input (see
DIO_PV
bit). The output pulse
rate is:
APULSE2
* F
S
*2
-32
*
WRATE
* X
* 2
-14
. This input is buffered
and can be loaded during a computation interval. The change will
take effect at the beginning of the next interval.
Fourth pulse generator input (see
DIO_PV
bit). The output pulse
rate is:
APULSE3
* F
S
*2
-32
*
WRATE
* X
* 2
-14
. This input is buffered
and can be loaded during a computation interval. The change will
take effect at the beginning of the next interval.
Register for pulse width control of XPULSE and YPULSE. The max-
imum pulse width is (2*PULSEWIDTH+1)*(1/FS). The default value
will generate pulses of 10 ms width at FS = 2520.62 Hz.
4.3.9
CE Calibration Parameters
Table 59: CE Calibration Parameters
lists the parameters that are typically entered to effect calibration of meter accuracy.
CE Ad-
dress
0x10
0x11
0x12
0x13
0x18
Name
CAL_IA
CAL_VA
CAL_IB
CAL_VB
PHADJ_A
Default
16384
16384
16384
16384
0
Description
These constants control the gain of their respective channels. The
nominal value for each parameter is 2
14
= 16384. The gain of
each channel is directly proportional to its gain constant. Thus, if
the gain of the IA channel is 1% slow,
CAL_IA
should be scaled by
1/(1 – 0.01) and the resulting value is 16549.
These two constants control the CT phase compensation. No com-
pensation occurs when
PHADJ_X
= 0. As
PHADJ_X
is increased,
more compensation (lag) is introduced. Range:
±
2
15
– 1. If it is
desired to delay the current by the angle
Φ,
the equations are:
0.02229
⋅
TAN
Φ
at 60Hz
PHADJ
_
X
=
2
20
0.1487
−
0.0131
⋅
TAN
Φ
0.0155
⋅
TAN
Φ
at 50Hz
0.1241
−
0.009695
⋅
TAN
Φ
This register contains the anchor or reference point for the tem-
perature measurement. At calibration temperature, the value read
at
TEMP_RAW_X
should be written to
TEMP_NOM.
The CE will
calculate the chip temperature
TEMP_X
relative to the reference
temperature.
The scale factor for the temperature calculation. It is not necessary
to use values other than the default value.
PHADJ
_
X
=
2
20
0x19
PHADJ_B
0
0x1F
TEMP_NOM
0
0x39
92
DEGSCALE
9174
© 2005-2009 TERIDIAN Semiconductor Corporation
v1.2
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
