71M6533/71M6534 Data Sheet
FDS_6533_6534_004
5.9.3 Digital Pins
Table 88: Digital Pins
Name
Type Circuit Description
COM3,COM2,
COM1,COM0
SEG0…SEG2,
SEG8,
O
O
5
5
LCD Common Outputs: These 4 pins provide the select signals for
the LCD display.
Dedicated LCD Segment Output pins.
SEG12…SEG18,
SEG20…SEG23
SEG24/DIO4
…
SEG31/DIO11,
SEG32/DIO12*
SEG33/DIO13
…
I/O
3, 4, 5 Multi-use pins, configurable as either LCD SEG driver or DIO.
(DIO4 = SCK, DIO5 = SDA when configured as EEPROM inter-
face; WPULSE = DIO6, VARPULSE = DIO7, DIO8 = XPULSE,
DIO9 = YPULSE when configured as pulse outputs).
Unused pins must be configured as outputs or terminated to
V3P3/GNDD.
SEG41/DIO21,
SEG42/DIO22*
SEG43/DIO23
…
SEG47/DIO27,
SEG48/DIO28*
SEG49/DIO29,
SEG50/DIO30,
SEG56/DIO36*
…
SEG32/DIO12, SEG42/DIO22, SEG48/DIO28, SEG56/DIO36
through SEG59/DIO39, SEG62/DIO42, SEG66/DIO45,
SEG72/DIO52 through SEG75/DIO55 are only available in the
71M6534.
SEG38/DIO18 and SEG42/DIO22 can be assigned to the multi-
plexed UART outputs/inputs MTX and MRX (71M6534 only). This
function is controlled by the I/O RAM registers UMUX_E and
UMUX_SEL.
SEG59/DIO39*
SEG61/DIO41,
SEG62/DIO42*
SEG63/DIO43
…
SEG65/DIO45,
SEG66/DIO45*
SEG67/DIO47
…
SEG71/DIO51
SEG72/DIO52*
…
SEG75/DIO55*
SEG51/E_TBUS0* I/O
SEG52/E_TBUS1*
SEG53/E_TBUS2*
SEG54/E_TBUS3*
SEG55/E_ISYNC_
BRKRQ*
5
Multiuse pins, configurable as either LCD SEG driver or emulator
trace bus or handshake (71M6534 only).
SEG3/PCLK
SEG4/PSDO
SEG5/PCSZ
SEG6/PSDI
I/O
3, 4, 5 Multi-use pins, configurable as either LCD SEG driver or SPI
PORT.
DIO3, DIO56,
DIO57, DIO58
I/O
3
Dedicated DIO Pins.
118
© 2007-2009 TERIDIAN Semiconductor Corporation
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