CDC9841
PC MOTHERBOARD CLOCK SYNTHESIZER/DRIVER
WITH 3-STATE OUTPUTS
SCAS458D – DECEMBER 1994 – REVISED APRIL 1996
switching characteristics (see Figures 1 and 2)
V
= 3.135 V
to 3.6 V,
CC
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
T
A
= 0°C to 70°C
MIN
MAX
200
400
4
PCLKn (C = 20 pF)
L
†
ps
ns
ps
t
skew
BCLKn (C = 30 pF)
L
†
Offset
BCLKn (C = 30 pF)
L
1
PCLKn (C = 20 pF)
L
PCLKn (C = 20 pF)
±250
±350
55%
L
†
Jitter
BCLKn (C = 30 pF)
L
†
Duty cycle
45%
20
Any output
SEL0 = L, SEL1 = L
16.7
15
PCLKn (C = 20 pF)
SEL0 = L, SEL1 = H
SEL0 = H, SEL1 = L
SEL0 = L, SEL1 = L
SEL0 = L, SEL1 = H
SEL0 = H, SEL1 = L
L
ns
t
c
40
33.3
30
BCLKn (C = 30 pF)
L
†‡
PCLKn (C = 20 pF), BCLKn (C = 30 pF)
2
2
ns
ns
t
t
L
L
r
†‡
PCLKn (C = 20 pF), BCLKn (C = 30 pF)
f
L
L
†
‡
Specifications are applicable only after the PLL stabilization time has elapsed.
Rise and fall times are characterized using the load circuits shown in Figure 1.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TI [ TEXAS INSTRUMENTS ]
