tm
TE
CH
T15V256A
AC CHARACTERISTICS
(
Vcc
=2.7V to 3.6V, Vss = 0V, Ta =
0 ~ +70
°C
/-40 to 85°C)
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
Chip Selection to Output in Low Z
Output Enable to Output in Low Z
Output Disable to Output in High Z
Output Hold from Address Change
SYM.
-50ns
MIN
MAX
-70ns
MIN. MAX.
-85ns
-100ns
UNIT
MIN. MAX. MIN. MAX.
t
RC
t
A A
t
ACS
t
A OE
t
CLZ*
t
OLZ*
t
OHZ*
t
OH
50
-
-
-
7
5
-
-
10
-
50
50
25
-
-
20
20
-
70
-
-
-
10
5
-
-
10
-
70
70
35
-
-
25
25
-
85
-
-
-
10
5
-
-
10
-
85
85
40
-
-
30
30
-
100
-
-
-
10
5
-
-
10
-
100
100
50
-
-
30
30
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
Chip Deselection to Output in High Z
t
CHZ*
* These parameters are measured with 5pF test load.
(2)WRITE CYCLE
PARAMETER
Write Cycle Time
Chip Selection to End of Write
Address Valid to End of Write
Address Setup Time
Write Pulse Width
Write Recovery Time
Data Valid to End of Write
Data Hold from End of Write
Write to Output in High Z
Output Active from End of Write
SYM.
-50ns
MIN
MAX
-70ns
-85ns
-100ns
MIN. MAX. MIN. MAX. MIN. MAX.
t
W C
t
CW
t
A W
t
A S
t
W P
t
W R
t
DW
t
DH
t
WHZ*
t
OW
50
40
40
0
30
0
25
0
-
5
-
-
-
-
-
-
-
-
20
-
70
60
60
0
50
0
30
0
-
5
-
-
-
-
-
-
-
-
25
-
85
70
70
0
60
0
35
0
-
5
-
-
-
-
-
-
-
-
30
-
100
80
80
0
70
0
40
0
-
5
-
-
-
-
-
-
-
-
30
-
UNI
T
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
* These parameters are measured with 5pF test load.
Taiwan Memory Technology, Inc. reserves the right
to change products or specifications without notice.
P. 5
Publication Date: SEP. 2001
Revision:A
TMT [ TAIWAN MEMORY TECHNOLOGY ]
