tm
CLK
DQM
COM MAND
TE
CH
T0
T1
T2
T3
T4
T5
T6
T431616D/E
T7
T8
1 Clk Interval
NOP
NOP
BANKA
ACTIVATE
NOP
READ A
WRITE A
NOP
NOP
NOP
CAS# latency=1
tCK1, DQ's
CAS# latency=2
tCK2, DQ's
DIN A0
Must be Hi-Z before
the Write Command
DIN A0
DIN A1
DIN A2
DIN A3
DIN A1
DIN A2
DIN A3
: "H" or "L"
Read to Write Interval
(Burst Length
≥
4, CAS# Latency = 1, 2)
T0
T1
T2
T3
T4
T5
T6
T7
T8
CLK
DQM
COMM AND
NOP
NOP
READ A
NOP
NOP
WRITE B
NOP
NOP
NOP
CAS# latency=1
tCK1, DQ's
CAS# latency=2
tCK2, DQ's
DOUT A0
DIN B0
Must be Hi-Z before
the Write Command
DIN B0
DIN B 1
DIN B2
DIN B3
DIN B 1
DIN B2
DIN B3
: "H" or "L"
Read to Write Interval
(Burst Length
≥
4, CAS# Latency = 1, 2)
A read burst without the auto precharge function may be interrupted by a BankPrecharge/ PrechargeAll
command to the same bank. The following figure shows the optimum time that BankPrecharge/ PrechargeAll
command is issued in different CAS# latency.
T0
CLK
Bank,
Col A
Bank,
Row
T1
T2
T3
T4
T5
T6
T7
T8
ADDR ESS
Bank (s)
t
RP
COM M AND
READ A
NOP
NOP
NOP
Precharge
NOP
NOP
Ac tivate
NOP
CAS# latency=1
tCK1 , DQ's
CAS# la tency=2
t CK2 , DQ's
CAS# la tency=3
t CK3 , DQ's
DOUT A 0
DOUT A 1
DOUT A 2
DOUT A 3
DOUT A 0
DOUT A 1
DOUT A 2
DOUT A 3
DOUT A 0
DOUT A 1
DOUT A 2
DOUT A 3
Read to Precharge
(CAS# Latency = 1, 2, 3)
TM Technology Inc. reserves the right
P. 8
to change products or specifications without notice.
Publication Date: FEB. 2007
Revision: A
TMT [ TAIWAN MEMORY TECHNOLOGY ]
