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T431616E-7SG 参数 Datasheet PDF下载

T431616E-7SG图片预览
型号: T431616E-7SG
PDF下载: 下载PDF文件 查看货源
内容描述: 1M ×16 SDRAM 512K X 16位X 2Banks同步DRAM [1M x 16 SDRAM 512K x 16bit x 2Banks Synchronous DRAM]
分类和应用: 动态存储器
文件页数/大小: 74 页 / 757 K
品牌: TMT [ TAIWAN MEMORY TECHNOLOGY ]
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TE  
tmCH  
T431616D/E  
6
Write and AutoPrecharge command (refer to the following figure)  
(RAS# = "H", CAS# = "L", WE# = "L", A11 = “V”, A10 = "H", A0-A7 = Column Address)  
The Write and AutoPrecharge command performs the precharge operation automatically after the write  
operation. Once this command is given, any subsequent command can not occur within a time delay of (burst  
{
length -1) + tWR + tRP(min.) . At full-page burst, only the write operation is performed in this command and the  
}
auto precharge function is ignored.  
T0  
T1  
T2  
T3  
T4  
T5  
T6  
T7  
T8  
CLK  
Bank A  
Write A  
COMMAND  
NOP  
NOP  
NOP  
NOP  
NOP  
NOP  
NOP  
AutoPrecharge  
Activate  
tDAL  
CAS# latency=1  
DIN  
DIN  
DIN  
A
A
A
DIN A  
DIN A  
DIN A  
0
0
0
1
1
1
*
*
*
t
, DQ's  
CK1  
tDAL  
CAS# latency=2  
, DQ's  
t
CK2  
tDAL  
CAS# latency=3  
t
, DQ's  
CK3  
Begin AutoPrecharge  
Bank can be reactivatedat completionof tDAL  
tDAL= tWR + tRP  
*
Burst Write with Auto-Precharge  
(Burst Length = 2, CAS# Latency = 1, 2, 3)  
7
Mode Register Set command  
(RAS# = "L", CAS# = "L", WE# = "L", A11 = “V”, A10 = “V”, A0-A9 = Register Data)  
The mode register stores the data for controlling the various operating modes of SDRAM. The Mode  
Register Set command programs the values of CAS# latency, Addressing Mode and Burst Length in the Mode  
register to make SDRAM useful for a variety of different applications. The default values of the Mode Register  
after power-up are undefined; therefore this command must be issued at the power-up sequence. The state of pins  
A0~A9 and A11 in the same cycle is the data written to the mode register. One clock cycle is required to  
complete the write in the mode register (refer to the following figure). The contents of the mode register can be  
changed using the same command and the clock cycle requirements during operation as long as both banks are in  
the idle state.  
TM Technology Inc. reserves the right  
to change products or specifications without notice.  
P. 11  
Publication Date: FEB. 2007  
Revision: A