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TS256MDOM44V-S 参数 Datasheet PDF下载

TS256MDOM44V-S图片预览
型号: TS256MDOM44V-S
PDF下载: 下载PDF文件 查看货源
内容描述: 44针IDE闪存模块 [44-Pin IDE Flash Module]
分类和应用: 闪存
文件页数/大小: 34 页 / 719 K
品牌: TRANSCEND [ TRANSCEND INFORMATION. INC. ]
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Transcend 44-Pin IDE Flash Module  
TS128M ~ 8GDOM44V-S  
Initiating an Ultra DMA Data-In Burst  
(a) An Ultra DMA Data-In burst is initiated by following the steps lettered below. The timing diagram is  
shown in below: Ultra DMA Data-In Burst Initiation Timing. The associated timing parameters are  
specified in Page 12: Ultra DMA Data Burst Timing Requirements and are described in Page 13: Ultra  
DMA Data Burst Timing Descriptions.  
(b) The following steps shall occur in the order they are listed unless otherwise specifically allowed:  
(c) The host shall keep -DMACK in the negated state before an Ultra DMA data burst is initiated.  
(d) The device shall assert DMARQ to initiate an Ultra DMA data burst. After assertion of DMARQ the  
device shall not negate DMARQ until after the first negation of DSTROBE.  
(e) Steps (c), (d), and (e) may occur in any order or at the same time. The host shall assert STOP.  
(f) The host shall negate -HDMARDY.  
(g) In True IDE mode, the host shall not assert -CS0, -CS1 and A[02:00].  
(h) Steps (c), (d), and (e) shall have occurred at least tACK before the host asserts -DMACK. The host  
shall keep -DMACK asserted until the end of an Ultra DMA data burst.  
(i) The host shall release D[15:00] within tAZ after asserting -DMACK.  
(j) The device may assert DSTROBE tZIORDY after the host has asserted -DMACK. While operating in  
True IDE mode, once the device has driven DSTROBE, the device shall not release DSTROBE until  
after the host has negated -DMACK at the end of an Ultra DMA data burst.  
(k) The host shall negate STOP and assert -HDMARDY within tENV after asserting -DMACK. After  
negating STOP and asserting -HDMARDY, the host shall not change the state of either signal until  
after receiving the first transition of DSTROBE from the device (i.e., after the first data word has been  
received).  
(l) The device shall drive D[15:00] no sooner than tZAD after the host has asserted -DMACK, negated  
STOP, and asserted -HDMARDY.  
(m) The device shall drive the first word of the data transfer onto D[15:00]. This step may occur when the  
device first drives D[15:00] in step (j).  
(n) To transfer the first word of data the device shall negate DSTROBE within tFS after the host has  
negated STOP and asserted -HDMARDY. The device shall negate DSTROBE no sooner than tDVS  
after driving the first word of data onto D[15:00].  
15  
Transcend Information Inc.  
Ver 1.2