欢迎访问ic37.com |
会员登录 免费注册
发布采购

VSC8061FC 参数 Datasheet PDF下载

VSC8061FC图片预览
型号: VSC8061FC
PDF下载: 下载PDF文件 查看货源
内容描述: 2.5Gb / s的16位复用器/解复用器芯片组 [2.5Gb/s 16-Bit Multiplexer/Demultiplexer Chipset]
分类和应用: 解复用器
文件页数/大小: 20 页 / 683 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
 浏览型号VSC8061FC的Datasheet PDF文件第1页浏览型号VSC8061FC的Datasheet PDF文件第2页浏览型号VSC8061FC的Datasheet PDF文件第4页浏览型号VSC8061FC的Datasheet PDF文件第5页浏览型号VSC8061FC的Datasheet PDF文件第6页浏览型号VSC8061FC的Datasheet PDF文件第7页浏览型号VSC8061FC的Datasheet PDF文件第8页浏览型号VSC8061FC的Datasheet PDF文件第9页  
VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
VSC8061/VSC8062
2.5Gb/s 16-Bit
Multiplexer/Demultiplexer Chipset
VSC8061 Multiplexer AC Characteristics
(Over recommended operating range)
Figure 3: VSC8061 Multiplexer Waveforms
t
CLK
High-speed differential clock input
t
D
CLK (CLKN)
CLK16 (CLK16N)
Parallel data clock output
t
DSU
t
DH
D[0:15]
Parallel data inputs
VALID DATA (1)
VALID DATA (2)
DCLK (DCLKN)
Parallel data clock input
t
D
DO (DON)
High-speed differential serial data output
D0
D1 D2 D3 D4
D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15
Serialized Data
NOTE:
=Don’t
care
t
D
Table 1: VSC8061 AC Characteristics
Parameter
t
CLK
t
D
t
DSU
t
DH
t
DC
t
R
, t
F
t
R
, t
F
t
R
, t
F
t
R
, t
F
Clock period
(1)
CLK16, DCLK period (t
CLK
x 16)
Parallel data set-up time with respect to CLK16
falling edge
Data hold time with respect to CLK16 falling
edge
CLK16 duty cycle
DCLK (DCLKN) rise and fall times
D[0:15] rise and fall times
CLK16 (CLK16N) rise and fall times
DO (DON) rise and fall times
0.5
150
Description
Min
400
6.4
2.0
0.5
40
Typ
Max
15.6
Units
ps
ns
ns
ns
Conditions
60
1.5
2.0
1.0
165
%
ns
ns
ns
ps
10% to 90%
10% to 90%
10% to 90%
20% to 80%
NOTE: (1) Devices are guaranteed to operate to a maximum frequency of 2.5GHz.
G52069-0, Rev 4.3
05/11/01
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 3