VITESSE
SEMICONDUCTOR CORPORATION
2.488 Gbit/sec to 2.7Gbit/sec
1:16 SONET/SDH Demux
Preliminary Datasheet
VSC8164
Decoupling of the power supplies is a critical element in maintaining the proper operation of the part. It is
recommended that the V
CC
power supply be decoupled using a 0.1
µ
F and 0.01
µ
F capacitor placed in parallel
on each V
CC
power supply pin as close to the package as possible. If room permits, a 0.001
µ
F capacitor should
also be placed in parallel with the 0.1
µ
F and 0.01
µ
F capacitors mentioned above. Recommended capacitors are
low inductance ceramic SMT X7R devices. For the 0.1
µ
F capacitor, a 0603 package should be used. The
0.01
µ
F and 0.001
µ
F capacitors can be either 0603 or 0402 packages.
For low frequency decoupling, 47
µ
F tantalum low inductance SMT caps should be sprinkled over the
board’s main +3.3V power supply and placed close to the C-L-C pi filter.
If the device is being used in an ECL environment with a -3.3V supply, then all references to decoupling
V
CC
must be changed to V
EE
, and all references to decoupling 3.3V must be changed to -3.3V.
AC Characteristics
Figure 5: AC Timing Waveforms
CLK16O+
Parallel data clock output
t
pdd
D(0...15)+
Parallel data outputs
VALID DATA (1)
VALID DATA (2)
CLK32O+
Parallel data clock output
t
pd32
Figure 6: High Speed Input Timing
DI+
High speed differential serial data input
D0
D1 D2
D3
D4 D5 D6 D7 D8 D9 D10D11 D12 D13D14 D15
HSCLKI+
High speed differential clock input
t
dsu
t
dh
Page 4
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52239-0, Rev. 3.3
5/17/00
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
