Preliminary
VG3664321(4)1(2)BT
CMOS Synchronous Dynamic RAM
VIS
Note 1
2.5 Command Truth Table for CKE
Current state CKE CKE CS RAS
CAS
WE
Address
Action
Notes
n - 1
n
Self refresh
(S.R.)
H
L
L
L
L
L
H
X
H
H
H
H
L
X
H
L
L
L
X
X
H
H
L
X
X
H
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
INVALID, CLK (n - 1)would exit S.R.
S.R. Recovery
S.R. Recovery
ILLEGAL
ILLEGAL
Maintain S.R.
2
2
X
H
X
X
Self refresh
recovery
H
Idle after tRC
H
H
L
H
H
X
X
Idle after tRC
H
H
H
H
H
H
L
L
H
L
H
H
L
L
L
L
H
L
X
H
L
L
H
L
L
L
X
X
X
X
H
L
X
H
H
L
X
X
X
X
L
X
X
H
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
ILLEGAL
ILLEGAL
Begin clock suspend next cycle
Begin clock suspend next cycle
ILLEGAL
5
5
ILLEGAL
Exit clock suspend next cycle
Maintain clock suspend
INVALID, CLK (n - 1) would exit P.D.
2
2
Power down
(P.D.)
X
X
EXIT P.D.® Idle
L
H
L
H
X
H
X
X
X
X
X
X
Maintain power down mode
Refer to operations in Operative
Command Table
Both banks idle
H
H
H
H
L
L
H
L
X
H
X
X
Refer to operations in Operative
Command Table
Refer to operation in Operative
Command Table
H
H
H
H
L
L
L
L
L
L
H
L
X
Auto Refresh
Op - Code Refer to operations in Operative
Command Table
H
H
H
L
L
L
H
L
L
X
H
L
X
X
H
X
X
X
Refer to operations in Operative
Command Table
Refer to operations in Operative
Command Table
Refer to operations in Operative
Command Table
H
H
L
L
L
L
L
L
L
L
H
L
X
Self refresh
3
Op - Code Refer to operations in Operative
Command Table
L
H
X
H
X
X
X
X
X
X
X
X
X
X
Power down
Refer to operations in Operative
Command Table
Begin clock suspend next cycle
Exit clock suspend next cycle
Maintain clock suspend
3
4
Any state other
than listed
above
H
L
L
L
H
L
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Note 1. H : Hight level, L : low level, X : High or low level (Don't care).
2. CKE Low to High transition will re - enable CLK and other inputs asynchronously. A minimum setup time
must be satisfied before any command other than EXIT.
3. Power down and Self refresh can be entered only from the both banks idle state.
4. Must be legal command as defined in Operative Command Table.
5. Illegal if tSREX is not satisfied.
Document : 1G5-0099
Rev.1
Page14
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
