VIS
Current state
Read with auto
precharge
CS RAS CA WE
H
L
L
L
L
L
L
L
L
Write with auto
precharge
H
L
L
L
L
L
L
L
L
Precharging
H
L
L
L
L
L
L
L
L
Row activating
H
L
L
L
L
L
L
L
L
X
H
H
H
H
L
L
L
L
X
H
H
H
H
L
L
L
L
X
H
H
H
H
L
L
L
L
X
H
H
H
H
L
L
L
L
X
H
H
L
L
H
H
L
L
X
H
H
L
L
H
H
L
L
X
H
H
L
L
H
H
L
L
X
H
H
L
L
H
H
L
L
X
H
L
H
L
H
L
H
L
X
H
L
H
L
H
L
H
L
X
H
L
H
L
H
L
H
L
X
H
L
H
L
H
L
H
L
X
X
X
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
X
Op - Code
X
X
X
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
X
Op - code
X
X
X
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
X
Op - Code
X
X
X
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
X
Op - Code
Address
VG36644041DT / VG36648041DT / VG36641641DT
CMOS Synchronous Dynamic RAM
(2/3)
Command
DESL
NOP
BST
WRIT/WRITA
ACT
PRE/PALL
PEF/SELF
MRS
DESL
NOP
BST
Action
Continue burst to end
Continue burst to end
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Continue burst to end
→
write
recovering with auto precharte
Continue burst to end
→
write
recovering with auto precharge
ILLEGAL
11
11
3,11
3,11
Notes
Precharging
Precharging
11
11
3,11
3,11
→
→
READ/READA ILLEGAL
READ/READA ILLEGAL
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Nop
Nop
Nop
→
→
→
Enter idle after t
RP
Enter idle after t
RP
Enter idle after t
RP
3
3
3
READ/READA ILLEGAL
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
ILLEGAL
ILLEGAL
Nop
→
Enter idle after t
RP
ILLEGAL
ILLEGAL
Nop
Nop
Nop
→
→
→
Enter row active after t
RCD
Enter row active after t
RCD
Enter row active after t
RCD
3
3
3, 9
3
READ/READA ILLEGAL
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Document :1G5-0177
Rev.2
Page 12
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
