White Electronic Designs
26.
ODT turn-off time t
AOF
(MIN) is when the device starts to turn off
ODT resistance. ODT turn off time t
AOF
(MAX) is when the bus is in
high impedance. Both are measured from t
AOFD
.
This parameter has a two clock minimum requirement at any t
CK
.
t
DELAY
is calculated from t
IS
+ t
CK
+ t
IH
so that CKE registration
LOW is guaranteed prior to CK, CK# being removed in a system
RESET condition.
t
ISXR
is equal to t
IS
and is used for CKE setup time during self
refresh exit.
No more than 4 bank ACTIVE commands may be issued in
a given t
FAW
(MIN) period. t
RRRD
(MIN) restriction still applies.
The t
FAW
(MIN) parameter applies to all 8 bank DDR2 devices,
regardless of the number of banks already open or closed.
t
RPA
timing applies when the PRECHARGE(ALL) command is
issued, regardless of the number of banks already open or closed.
If a single-bank PRECHARGE command is issued, t
RP
timing
applies. t
RPA
(MIN) applies to all 8-bank DDR2 devices.
35.
34.
32.
33.
W3HG264M72EER-AD7
ADVANCED
Value is minimum pulse width, not the number of clock
registrations.
Applicable to Read cycles only. Write cycles generally require
additional time due to Write recovery time (t
WR
) during arto
precharge.
t
CKE
(MIN) of 3 clocks means CKE must be registered on three
consecutive positive clock edges. CKE must remain at the valid
input level the entire time it takes to achieve the 3 clocks of
registration. Thus, after any CKE transition, CKE may not transition
from its valid level during the time period of t
IS
+ 2* t
CK
+ t
IH
.
This parameter is not referenced to a specific voltage level, but
specified when the device output is no longer driving (t
RPST
) or
beginning to drive (t
RPRE
).
When DQS is used single-ended, the minimum limit is reduced by
100ps.
27.
28.
29.
30.
31.
36.
December 2005
Rev. 0
11
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