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WED2ZL361MV50BI 参数 Datasheet PDF下载

WED2ZL361MV50BI图片预览
型号: WED2ZL361MV50BI
PDF下载: 下载PDF文件 查看货源
内容描述: 1Mx36同步管道突发NBL SRAM [1Mx36 Synchronous Pipeline Burst NBL SRAM]
分类和应用: 存储内存集成电路静态存储器
文件页数/大小: 12 页 / 331 K
品牌: WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
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White Electronic Designs
FIGURE 4 – TIMING WAVEFORM OF WRITE CYCLE
WED2ZL361MV
t
CH
t
CL
Clock
Address
A1
A2
A3
WRITE#
CEx#
ADV
OE#
t
DS
t
DH
D3-2
D3-3
D3-4
Data In
t
HZOE
D1-1
D2-1
D2-2
D2-3
D2-4
D3-1
Data Out
Q0-3
Q0-4
NOTES:
WRITE# = L means WE# = L, and BWx = L
CEx# refers to the combination of CE
1#
, CE
2
and CE
2#
.
Don't Care
Undefined
June 2004
Rev. 3
8
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com