White Electronic Designs
8Mx32 SDRAM
FEATURES
53% Space Savings vs. Monolithic Solution
Reduced System Inductance and Capacitance
Pinout and Footprint Compatible to SSRAM 119 BGA
3.3V Operating Supply Voltage
Fully Synchronous to Positive Clock Edge
Clock Frequencies of 133MH
Z
, 125MH
Z
and 100MH
Z
Burst Operation
WED3DL328V
DESCRIPTION
The WED3DL328V is an 8Mx32 Synchronous DRAM
configured as 4x2Mx32. The SDRAM BGA is constructed
with two 8Mx16 SDRAM die mounted on a multi-layer
laminate substrate and packaged in a 119 lead, 14mm by
22mm, BGA.
The WED3DL328V is an ideal SDRAM wide I/O memory
solution for all high performance, computer applications
which include Network Processors, DSPs and Functional
ASICs.
The WED3DL328V is available in clock speeds of 133MH
Z
,
125MH
Z
and 100MH
Z
. The range of operating frequencies,
programmable burst lengths and programmable latencies
allow the same device to be useful for a variety of
high bandwidth, high performance memory system
applications.
The package and design provides performance
enhancements via a 50% reduction in capacitance vs.
two monolithic devices. The design includes internal ground
and power planes which reduces inductance on the ground
and power pins allowing for improved decoupling and a
reduction in system noise.
Sequential or Interleave
Burst Length = Programmable 1, 2, 4, 8 or Full
Page
Burst Read and Write
Multiple Burst Read and Single Write
Data Mask Control Per Byte
Auto and Self Refresh
Automatic and Controlled Precharge Commands
Suspend Mode and Power Down Mode
119 Pin BGA, JEDEC MO-163
PIN CONFIGURATION
(TOP VIEW)
1
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
CCQ
NC
NC
DQc
DQc
V
CCQ
DQc
DQc
V
CCQ
DQd
DQd
V
CCQ
DQd
DQd
NC
NC
V
CCQ
1
2
NC
NC
NC
NC
DQc
DQc
DQc
DQc
VCC
DQd
DQd
DQd
DQd
NC
A6
NC
NC
2
3
BA0
NC/A12*
BA1
V
SS
V
SS
V
SS
DQMC
V
SS
NC
V
SS
DQMD
V
SS
V
SS
V
SS
NC
A5
NC
3
4
NC
CAS#
V
CC
NC
CE#
RAS#
NC
CKE
V
CC
CK
NC
WE#
A1
A0
V
CC
A4
NC
4
5
A10
A11
A9
V
SS
V
SS
V
SS
DQMB
V
SS
NC
V
SS
DQMA
V
SS
V
SS
V
SS
NC
A3
NC
5
6
A7
NC
A8
NC
DQb
DQb
DQb
DQb
V
CC
DQa
DQa
DQa
DQa
NC
A2
NC
NC
6
7
V
CCQ
NC
NC
DQb
DQb
V
CCQ
DQb
DQb
V
CCQ
DQa
DQa
V
CCQ
DQa
DQa
NC
NC
V
CCQ
7
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
PIN DESCRIPTION
A0 – A11
BA0-1
DQ
CK
CKE
DQM
RAS#
CAS#
CE#
V
CC
V
CCQ
V
SS
Address Bus
Bank Select Addresses
Data Bus
Clock
Clock Enable
Data Input/Output Mask
Row Address Strobe
Column Address Strobe
Chip Enable
Power Supply pins, 3.3V
Data Bus Power Supply pins,3.3V
Ground pins
*NOTE: Pin B3 is designated as NC/A12. This pin is used for future density upgrades as address pin A12.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
June, 2002
Rev. 1
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
