W28V400B/T
1. GENERAL DESCRIPTION
The W28V400B/T Flash memory with SmartVoltage technology is a high-density, cost-effective,
nonvolatile, read/write storage solution for a wide range of applications. It operates off of VDD = 2.7V
and VPP = 2.7V. This low voltage operation capability realize battery life and suits for cellular phone
application. Its Boot, Parameter and Main-blocked architecture, as well as low voltage and extended
cycling. These features provide a highly flexible device suitable for portable terminals and personal
computers. Additionally, the enhanced suspend capabilities provide an ideal solution for both code
and data storage applications. For secure code storage applications, such as networking where code
is either directly executed out of flash or downloaded to DRAM, the device offers four levels of
protection. These are: absolute protection, enabled when VPP ≤ VPPLK; selective hardware blocking;
flexible software blocking; or write protection. These alternatives give designers comprehensive
control over their code security needs. The device is manufactured on 0.35 µm process technology. It
comes in industry-standard package: the 48-lead TSOP, ideal for board constrained applications.
2. FEATURES
• SmartVoltage Technology
− VDD = 2.7V, 3.3V or 5V
− VPP = 2.7V, 3.3V, 5V or 12V
• User-Configurable x 8 or x 16 Operation
• High-Performance Access Time
− 85 nS (5V ±0.25V), 90 nS (5V ±0.5V),
100 nS (3.3V ±0.3V), 120 nS (2.7V to 3.6V)
− Automatic Power Savings Mode Decreases
CCR in Static Mode
I
• Enhanced Automated Suspend Options
− Word/Byte Write Suspend to Read
− Block Erase Suspend to Word/Byte Write
− Block Erase Suspend to Read
• Enhanced Data Protection Features
− Absolute Protection with VPP ≤ VPPLK
• Operating Temperature
− 0° C to +70° C
− Block Erase, Full Chip Erase, Word/Byte
Write and Lock-Bit Configuration Lockout
during Power Transitions
− Block Blocks Protection with #WP = VIL
• Automated Word/Byte Write and Block Erase
− Command User Interface (CUI)
− Status Register (SR)
• SRAM-Compatible Write Interface
• Industry-Standard Packaging
− 48-Lead TSOP
• Optimized Array Blocking Architecture
− Two 4k-word (8k-byte) Boot Blocks
− Six 4k-word (8k-byte) Parameter Blocks
− Seven 32k-word (64k-byte) Main Blocks
− Top Boot Location (W28V400TT)
− Bottom Boot Location (W28V400BT)
• Extended Cycling Capability
− Minimum 100,000 Block Erase Cycles
• Low Power Management
− Deep Power-down Mode
Publication Release Date: April 11, 2003
- 3 -
Revision A4
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