W77C32/W77C032A
Table 3. Instruction Timing for W77C032, continued
W77C032
MACHINE
CYCLES
W77C032
CLOCK
CYCLES
8032
CLOCK
CYCLES
W77C032 VS.
8032 SPEED
RATIO
HEX
OP-CODE
INSTRUCTION
BYTES
ORL A, direct
ORL A, #data
ORL direct, A
ORL direct, #data
ORL C, bit
ORL C, /bit
PUSH direct
POP direct
RET
45
44
42
43
72
A0
C0
D0
22
32
23
33
03
13
D3
D2
C4
80
98
99
9A
9B
9C
9D
9E
9F
96
97
95
94
C8
C9
CA
CB
CC
CD
CE
CF
2
2
2
3
2
2
2
2
1
1
1
1
1
1
1
2
1
2
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
2
2
2
3
2
2
2
2
2
2
1
1
1
1
1
2
1
3
1
1
1
1
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
8
8
8
12
8
6
8
8
8
8
4
4
4
4
4
8
4
12
4
4
4
4
4
4
4
4
4
4
8
8
4
4
4
4
4
4
4
4
12
12
12
24
24
24
24
24
24
24
12
12
12
12
12
12
12
24
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
1.5
1.5
1.5
2
3
3
3
3
3
RETI
3
RL A
3
RLC A
3
RR A
3
RRC A
3
SETB C
3
SETB bit
1.5
3
SWAP A
SJMP rel
2
SUBB A, R0
SUBB A, R1
SUBB A, R2
SUBB A, R3
SUBB A, R4
SUBB A, R5
SUBB A, R6
SUBB A, R7
SUBB A, @R0
SUBB A, @R1
SUBB A, direct
SUBB A, #data
XCH A, R0
XCH A, R1
XCH A, R2
XCH A, R3
XCH A, R4
XCH A, R5
XCH A, R6
XCH A, R7
3
3
3
3
3
3
3
3
3
3
1.5
1.5
3
3
3
3
3
3
3
3
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