W77C32/W77C032A
Table 3. Instruction Timing for W77C032, continued
INSTRUCTION
ADDC A, R7
ADDC A, @R0
ADDC A, @R1
ADDC A, direct
ADDC A, #data
ACALL addr11
HEX
OP-CODE
3F
36
37
35
34
71, 91, B1,
11, 31, 51,
D1, F1
01, 21, 41,
61, 81, A1,
C1, E1
58
59
5A
5B
5C
5D
5E
5F
56
57
55
54
52
53
82
B0
B5
BD
BE
BF
E4
F4
C3
C2
B3
B2
14
18
19
1A
BYTES
1
1
1
2
2
2
W77C032
MACHINE
CYCLES
1
1
1
2
2
3
W77C032
CLOCK
CYCLES
4
4
4
8
8
12
8032
CLOCK
CYCLES
12
12
12
12
12
24
W77C032 VS.
8032 SPEED
RATIO
3
3
3
1.5
1.5
2
AJMP ADDR11
ANL A, R0
ANL A, R1
ANL A, R2
ANL A, R3
ANL A, R4
ANL A, R5
ANL A, R6
ANL A, R7
ANL A, @R0
ANL A, @R1
ANL A, direct
ANL A, #data
ANL direct, A
ANL direct, #data
ANL C, bit
ANL C, /bit
CJNE A, direct, rel
CJNE R5, #data, rel
CJNE R6, #data, rel
CJNE R7, #data, rel
CLR A
CPL A
CLR C
CLR bit
CPL C
CPL bit
DEC A
DEC R0
DEC R1
DEC R2
2
1
1
1
1
1
1
1
1
1
1
2
2
2
3
2
2
3
3
3
3
1
1
1
2
1
2
1
1
1
1
3
1
1
1
1
1
1
1
1
1
1
2
2
2
3
2
2
4
4
4
4
1
1
1
2
1
2
1
1
1
1
12
4
4
4
4
4
4
4
4
4
4
8
8
8
12
8
8
16
16
16
16
4
4
4
8
4
8
4
4
4
4
24
12
12
12
12
12
12
12
12
12
12
12
12
12
24
24
24
24
24
24
24
12
12
12
12
12
12
12
12
12
12
2
3
3
3
3
3
3
3
3
3
3
1.5
1.5
1.5
2
3
3
1.5
1.5
1.5
1.5
3
3
3
1.5
3
1.5
3
3
3
3
- 28 -
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