W79E804ADG 参数 Datasheet PDF下载

W79E804A/803A/802A

14. NVM MEMORY

The W79E804 series have NVM data memory of

256

bytes for customer’s data store used. The NVM

data memory has

four

pages area and each page has 64 bytes as below figure. The

Page 0

address

is from

FC00h ~ FC3Fh, Page 1

address is from

FC40h ~ FC7Fh, Page 2

address is from

FC80h ~

FCBFh,

and

Page 3

address is from

FCC0h ~ FCFFh.

The NVM memory can be read/write by customer program to access. Read NVM data is by MOVC

A,@A+DPTR instruction, and write data is by SFR of NVMADDR, NVMDAT and NVMCON. Before

write data to NVM memory, the page must be erased by providing page address on NVMADDR, which

low byte address of On-Chip Code Memory space will decode, then set EER of NVMCON.7. This will

automatically hold fetch program code and PC Counter, and execute page erase. After finished, this

bit will be cleared by hardware. The erase time is ~ 5ms.

For writing data to NVM memory, user must set address and data to NVMADDR and NVMDAT, then

set EWR of NVMCON.6 to initiate nvm data write. The uC will hold program code and PC Counter,

and then write data to mapping address. Upon write completion, the EWR bit will be cleared by

hardware, the uC will continue execute next instruction. The program time is ~50us.

Figure 14-1: W79E804/803/802 Memory Map

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