W79E804ADG 参数 Datasheet PDF下载

W79E804A/803A/802A

Figure 24-2: I2C Timer Count Block Diagram

24.3 Modes of Operation

The on-chip I2C ports support five operation modes, Master transmitter, Master receiver, Slave

transmitter, Slave receiver, and GC call.

In a given application, I2C port may operate as a master or as a slave. In the slave mode, the I2C port

hardware looks for its own slave address and the general call address. If one of these addresses is

detected, and if the slave is willing to receive or transmit data from/to master(by setting the AA bit),

acknowledge pulse will be transmitted out on the 9th clock, hence an interrupt is requested on both

master and slave devices if interrupt is enabled. When the microcontroller wishes to become the bus

master, the hardware waits until the bus is free before the master mode is entered so that a possible

slave action is not interrupted. If bus arbitration is lost in the master mode, I2C port switches to the

slave mode immediately and can detect its own slave address in the same serial transfer.

24.3.1 Master Transmitter Mode

Serial data output through SDA while SCL outputs the serial clock. The first byte transmitted contains

the slave address of the receiving device (7 bits) and the data direction bit. In this case the data

direction bit (R/W) will be logic 0, and it is represented by “W” in the flow diagrams. Thus the first byte

transmitted is SLA+W. Serial data is transmitted 8 bits at a time. After each byte is transmitted, an

acknowledge bit is received. START and STOP conditions are output to indicate the beginning and the

end of a serial transfer.

24.3.2 Master Receiver Mode

In this case the data direction bit (R/W) will be logic 1, and it is represented by “R” in the flow

diagrams. Thus the first byte transmitted is SLA+R. Serial data is received via SDA while SCL outputs

the serial clock. Serial data is received 8 bits at a time. After each byte is received, an acknowledge bit

is transmitted. START and STOP conditions are output to indicate the beginning and end of a serial

transfer.

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