W79E632A/W79L632A
Table 1. Special Function Register Location Table
F8
F0
E8
E0
D8
D0
C8
C0
B8
B0
A8
A0
98
90
88
80
IP
P3
IE
P2
SCON0
P1
TCON
P0
TMOD
SP
SADDR
XRAMAH
SBUF
P4CSIN
P42AL
P4CONA
TL0
DPL
P42AH
P4CONB
TL1
DPH
P43AL
P40AL
TH0
ROMCON
SFRAL
SFRAH
P4
P43AH
P40AH
TH1
P41AL
CKCON
PCON
CHPCON
P41AH
SFDFD
SFRCN
SADEN
EIP
B
EIE
ACC
WDCON
PSW
T2CON
T2MOD
RCAP2L
RCAP2H
PWM5
TL2
PMR
TH2
STATUS
PWMCON2 PWM4
TA
PWMP
PWM0
PWM1
PWMCON1 PWM2
PWM3
Note:
The SFRs in the column with dark borders are bit-addressable.
A brief description of the SFRs is shown follows.
Port 0
Bit:
7
P0.7
Mnemonic: P0
6
P0.6
5
P0.5
4
P0.4
3
P0.3
2
P0.2
1
P0.1
0
P0.0
Address: 80h
Port 0 is an open-drain bi-directional I/O port. This port also provides a multiplexed low order
address/data bus during accesses to external memory. Besides, it has internal pull-up resisters
enabled by setting P0UP of P4CSIN (A2H) to high.
Stack Pointer
Bit:
7
SP.7
Mnemonic: SP
6
SP.6
5
SP.5
4
SP.4
3
SP.3
2
SP.2
1
SP.1
0
SP.0
Address: 81h
The Stack Pointer stores the Scratchpad RAM address where the stack begins. In other words, it
always points to the top of the stack.
-9-
Publication Release Date: February 1, 2007
Revision A6
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