W83176R-732
5.1
Clock Outputs
PIN
PIN NAME
TYPE
DESCRIPTION
27, 25, 16,
14, 5, 1
26, 24, 17,
13, 4, 2
22
7
8
9, 18, 21
19
CLKC [5:0]
CLKT [5:0]
SDATA *
SCLK *
CLK_INT
N/C
FB_OUTT
OUT
OUT
I/O
IN
IN
NC
OUT
Complementary Clocks of differential pair outputs
True Clocks of differential pair outputs
Serial data of I
2
C 2-wire control interface
Internal pull-up resistor 120K to VDD
Serial clock of I
2
C 2-wire control interface
Internal pull-up resistor 120K to VDD
True reference clock input, 3.3V tolerant input
Not connected
True Feedback output, dedicated for external feedback.
It switches at the same frequency as the CLK. This
output must be wired to FB_INT.
True Feedback input, provides feedback signal to the
internal PLL for synchronization with CLK_INT to
eliminate phase error.
20
FB_INT
IN
5.2 Power Pins
PIN
PIN NAME
DESCRIPTION
6, 11, 15, 28
3, 12, 23
10
GND
VDD
AVDD
Ground
Power supply 2.5V
Analog power supply, 2.5V
-3-
Publication Release Date: April 13, 2005
Revision 1.1
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