W83195R-08
PRELIMINARY
9.0 SPECIFICATIONS
9.1 ABSOLUTE MAXIMUM RATINGS
Stresses greater than those listed in this table may cause permanent damage to the device.
Precautions should be taken to avoid application of any voltage higher than the maximum rated
voltages to this circuit. Subjection to maximum conditions for extended periods may affect reliability.
Unused inputs must always be tied to an appropriate logic voltage level (Ground or Vdd).
Symbol
Vdd , V
IN
T
STG
T
B
T
A
Parameter
Voltage on any pin with respect to GND
Storage Temperature
Ambient Temperature
Operating Temperature
Rating
- 0.5 V to + 7.0 V
- 65°C to + 150°C
- 55°C to + 125°C
0°C to + 70°C
9.2 AC CHARACTERISTICS
Vddq4 = Vddq3 = Vddq2 = Vddq1=3.3V
±
5 %, VddL1=VddL2 = 2.375V~2.9V , T
A
= 0°C to +70°C
Parameter
Output Duty Cycle
CPU/SDRAM to PCI Offset
Skew (CPU-CPU), (PCI-
PCI), (SDRAM-SDRAM)
CPU/SDRAM
Cycle to Cycle Jitter
CPU/SDRAM
Absolute Jitter
Jitter Spectrum 20 dB
Bandwidth from Center
Output Rise (0.4V ~ 2.0V)
& Fall (2.0V ~0.4V) Time
Overshoot/Undershoot
Beyond Power Rails
Ring Back Exclusion
V
RBE
0.7
2.1
V
t
TLH
t
THL
V
over
0.7
1.5
V
0.4
1.6
ns
15 pF Load on CPU and PCI
outputs
22
Ω
at source of 8 inch PCB
run to 15 pF load
Ring Back must not enter this
range.
BW
J
500
KHz
t
JA
500
ps
t
OFF
t
SKEW
t
CCJ
Symbol
Min
45
1
Typ
50
Max
55
4
250
¡Ó
250
Units
%
ns
ps
ps
Test Conditions
Measured at 1.5V
15 pF Load Measured at 1.5V
15 pF Load Measured at 1.5V
- 10 -
Publication Release Date: Mar. 1999
Revision 0.30