WM8196
Production Data
Test Conditions
AVDD = DVDD1 = 5.0V, DVDD2 = 3.3V, AGND = DGND = 0V, T
A
= 25°C, MCLK = 24MHz unless otherwise stated.
PARAMETER
Programmable Gain Amplifier
Resolution
Gain
Max gain, each channel
Min gain, each channel
Gain error, each channel
Analogue to Digital Converter
Resolution
Speed
Full-scale input range
(2*(VRT-VRB))
DIGITAL SPECIFICATIONS
Digital Inputs
High level input voltage
Low level input voltage
High level input current
Low level input current
Input capacitance
Digital Outputs
High level output voltage
Low level output voltage
High impedance output current
Digital IO Pins
Applied high level input voltage
Applied low level input voltage
High level output voltage
Low level output voltage
Low level input current
High level input current
Input capacitance
High impedance output current
Supply Currents
Total supply current
−
active
(Three channel mode)
Total supply current
−
active
(Single channel mode)
Total analogue supply current
−
active (Three channel mode)
Total analogue supply current
−
active (One channel mode)
Digital core supply current,
DVDD1
−
active (Note1)
Digital I/O supply current,
DVDD2
−
active (Note1)
Supply current
−
full power down
mode
I
AVDD
I
AVDD
MCLK = 24MHz
LINEBYLINE = 1
MCLK = 24MHz
MCLK = 24MHz
LINEBYLINE = 1
MCLK = 24MHz
MCLK = 24MHz
MCLK = 24MHz
60
45
56
41
3
1
300
mA
mA
mA
mA
mA
mA
µA
V
IH
V
IL
V
OH
V
OL
I
IL
I
IH
C
I
I
OZ
5
1
I
OH
= 1mA
I
OL
= 1mA
DVDD2 - 0.5
0.5
1
1
0.8
∗
DVDD2
0.2
∗
DVDD2
V
V
V
V
µA
µA
pF
µA
V
OH
V
OL
I
OZ
I
OH
= 1mA
I
OL
= 1mA
DVDD2 - 0.5
0.5
1
V
V
µA
V
IH
V
IL
I
IH
I
IL
C
I
5
0.8
∗
DVDD2
0.2
∗
DVDD2
1
1
V
V
µA
µA
pF
16
12
3
Bits
MSPS
V
G
MAX
G
MIN
8
208
283
−
PGA[7 : 0]
SYMBOL
TEST
CONDITIONS
MIN
TYP
MAX
UNIT
bits
V/V
V/V
V/V
%
7.4
0.74
1
w
PD Rev 4.3 March 2007
7