WM8510
CONTROL INTERFACE TIMING – 2-WIRE MODE
t
3
SDIN
t
4
t
6
SCLK
t
1
t
9
t
7
t
2
t
8
t
5
t
3
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Figure 5 Control Interface Timing – 2-Wire Serial Control Mode
Test Conditions
DCVDD=1.62V, DBVDD=AVDD=SPKVDD=3.3V, DGND=AGND=SPKGND=0V, T
A
= +25
o
C, Slave Mode, fs = 48kHz, MCLK =
256fs, 24-bit data, unless otherwise stated.
PARAMETER
Program Register Input Information
SCLK Frequency
SCLK Low Pulse-Width
SCLK High Pulse-Width
Hold Time (Start Condition)
Setup Time (Start Condition)
Data Setup Time
SDIN, SCLK Rise Time
SDIN, SCLK Fall Time
Setup Time (Stop Condition)
Data Hold Time
Pulse width of spikes that will be suppressed
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
ps
0
600
900
5
0
600
1.3
600
600
100
300
300
400
kHz
ns
us
ns
ns
ns
ns
ns
ns
ns
ns
SYMBOL
MIN
TYP
MAX
UNIT
w
PP Rev 1.2 December 2004
12
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
