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WM8521 参数 Datasheet PDF下载

WM8521图片预览
型号: WM8521
PDF下载: 下载PDF文件 查看货源
内容描述: 并集成了输出阶段2VRMS线路输出的立体声DAC [STEREO DAC WITH INTEGRATED OUTPUT STAGE FOR 2VRMS LINE OUT]
分类和应用: 输出元件
文件页数/大小: 20 页 / 301 K
品牌: WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
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WM8521
DEVICE DESCRIPTION
GENERAL INTRODUCTION
The WM8521 is a high performance DAC designed for digital consumer audio applications requiring
a 2Vrms output. The range of features make it ideally suited for use in DVD players, Digital TV,
Digital Set Top Boxes, AV receivers and other consumer audio equipment.
The WM8521 is a complete 2-channel stereo audio digital-to-analogue converter, including digital
interpolation filter, multi-bit sigma delta with dither, switched capacitor multi-bit stereo DAC and
output smoothing filters combined with 2Vrms outputs. It is fully compatible and an ideal partner for a
range of industry standard microprocessors, controllers and DSPs. A novel multi bit sigma-delta DAC
design is used, utilising a 128x oversampling rate, to optimise signal to noise performance and offer
increased clock jitter tolerance.
Control of internal functionality of the device is provided by hardware control (pin programmed).
Operation using master clocks of 256fs, 384fs, 512fs or 768fs is provided, selection between clock
rates being automatically controlled. Sample rates (fs) from 8kHz to 96kHz are allowed provided the
appropriate system clock is input.
The audio data interface supports 16-bit right justified or 16-, 20-, 24-, 32-bit I
2
S (Philips left justified,
one bit delayed) interface formats. A 16bit DSP interface is also supported, enhancing the interface
options for the user.
The device is packaged in a small 14-pin SOIC.
DAC CIRCUIT DESCRIPTION
The WM8521 DAC is designed to allow playback of 24-bit PCM audio or similar data with high
resolution and low noise and distortion. Sample rates from 8kHz to 96kHz may be used provided that
the ratio of sample rate (LRCLK) to master clock (MCLK) is maintained at one of the required rates.
The two DACs on the WM8521 are implemented using sigma-delta oversampled conversion
techniques. These require that the PCM samples are digitally filtered and interpolated to generate a
set of samples at a much higher rate than the input rate. This sample stream is then digitally
modulated to generate a digital pulse stream that is then converted to analogue signals in a switched
capacitor DAC. The advantage of this technique is that the DAC is linearised using noise shaping
techniques, allowing the 24-bit resolution to be met using non-critical analogue components. A
further advantage is that the high sample rate at the DAC output means that smoothing filters on the
output of the DAC need only have fairly crude characteristics in order to remove the characteristic
steps, or images on the output of the DAC. To ensure that generation of tones characteristic to
sigma-delta convertors is not a problem, dithering is used in the digital modulator along with a higher
order modulator. The multi-bit switched capacitor technique used in the DAC reduces sensitivity to
clock jitter, and dramatically reduces out of band noise compared to switched current or single bit
techniques used in other implementations.
The voltage on the CAP pin is used as the reference for the DACs. Therefore the amplitude of the
signals at the DAC outputs will scale with the amplitude of the voltage at the CAP pin. An external
reference could be used to drive into the CAP pin if desired, with a value typically of about midrail
ideal for optimum performance. However driven in normal operation, an internal divider will set a
valve of AVDD/2 on the cap pin.
w
PP Rev 1.3 December 2004
9