Production Data
WM8580
PIN DESCRIPTION
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
NAME
PGND
PVDD
XTI
XTO
MFP10
MFP9
MFP8
MFP7
MFP6
SPDIFOP
MFP5
MFP4
MFP3
SPDIFIN1
CLKOUT
DVDD
DGND
MUTE
DIN1
DIN2
DIN3
PAIFRX_LRCLK
PAIFRX_BCLK
MCLK
DOUT
PAIFTX_LRCLK
MFP1
MFP2
HWMODE
SWMODE
SDO
SDIN
SCLK
CSB
AINR
AINL
ADCREFP
VMID
AGND
AVDD
VOUT1L
VOUT1R
VOUT2L
VOUT2R
VREFP
VREFN
TYPE
Supply
Supply
Digital Input
Digital Output
Digital Output
Digital Output
Digital Input/Output
Digital Input/Output
Digital Input/Output
Digital Output
Digital Input/Output
Digital Input/Output
Digital Input/Output
Digital Input
Digital Output
Supply
Supply
Digital Input/Output
Digital Input
Digital Input
Digital Input
Digital Input/Output
Digital Input/Output
Digital Input/Output
Digital Output
Digital Input/Output
Digital Input/Output
Digital Input/Output
Digital Input
Digital Input/Output
Digital Output
Digital Input/Output
Digital Input
Digital Input
Analogue Input
Analogue Input
Analogue Output
Analogue Output
Supply
Supply
Analogue Output
Analogue Output
Analogue Output
Analogue Output
Analogue Input
Analogue Input
PLL ground
PLL positive supply
Crystal or CMOS clock input
Crystal output
Multi-Function Pin (MFP) 10. See Table 1 for details of all MFP pins.
Multi-Function Pin (MFP) 9. See Table 1 for details of all MFP pins.
Multi-Function Pin (MFP) 8. See Table 1 for details of all MFP pins.
Multi-Function Pin (MFP) 7. See Table 1 for details of all MFP pins.
Multi-Function Pin (MFP) 6. See Table 1 for details of all MFP pins.
S/PDIF transmitter output.
Multi-Function Pin (MFP) 5. See Table 1 for details of all MFP pins.
Multi-Function Pin (MFP) 4. See Table 1 for details of all MFP pins.
Multi-Function Pin (MFP) 3. See Table 1 for details of all MFP pins.
S/PDIF receiver input 1
PLL or crystal oscillator clock output
Digital positive supply
Digital ground
DAC mute-all Input / All-DAC Infinite Zero Detect (IZD) flag output
Primary Audio Interface (PAIF) receiver data input 1
Primary Audio Interface (PAIF) receiver data input 2
Primary Audio Interface (PAIF) receiver data input 3
Primary Audio Interface (PAIF) receiver left/right word clock
Primary Audio Interface (PAIF) receiver bit clock
System Master clock; 256, 384, 512, 768, 1024 or 1152 fs
Primary Audio Interface (PAIF) transmitter data output
Primary audio interface transmitter left/right word clock
Multi-Function Pin (MFP) 1. See Table 1 for details of all MFP pins.
Multi-Function Pin (MFP) 2. See Table 1 for details of all MFP pins.
Configures control to be either Software Mode or Hardware Mode
Configures software interface to be either 2-wire or 3-wire. See note 2.
3-wire control interface data output. See note 3.
Control interface data input (and output under 2-wire control)
Control interface clock
3-wire control interface latch signal / device address selection
ADC Right Channel Input
ADC Left Channel Input
ADC reference buffer decoupling pin; 10uF external decoupling
Midrail divider decoupling pin; 10uF external decoupling
Analogue ground
Analogue positive supply
DAC channel 1 left output
DAC channel 1 right output
DAC channel 2 left output
DAC channel 2 right output
DAC and ADC positive reference
DAC and ADC ground reference
DESCRIPTION
w
PD Rev 4.0 February 2007
5
WOLFSON [ WOLFSON MICROELECTRONICS PLC ]
