WM8711BL
Production Data
ELECTRICAL CHARACTERISTICS
Test Conditions
AVDD, HPVDD, DBVDD = 1.8V, AGND = 0V, DCVDD = 1.5V, DGND = 0V, TA = +25oC, Slave Mode, fs = 48kHz, MCLK = 256fs
unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Digital Logic Levels (CMOS Levels)
Input LOW level
VIL
VIH
0.3 x DBVDD
0.1 x DBVDD
V
V
V
V
Input HIGH level
0.7 x DBVDD
0.9 x DBVDD
Output LOW
VOL
VOH
IOL = 1mA
Output HIGH
IOH = -1mA
Power On Reset Threshold (DCVDD)
DCVDD Threshold On -> Off
Hysteresis
0.9
0.3
0.6
V
V
V
DCVDD Threshold Off -> On
Analogue Reference Levels
Reference voltage (VMID)
Potential divider resistance
VVMID
RVMID
AVDD/2
50k
V
Ω
Line Output for DAC Playback Only (Load = 10KΩ. 50pF)
0dBFs Full scale output voltage
Signal to Noise Ratio
At LINE outputs
AVDD/3.3
Vrms
dB
SNR
AVDD=HPVDD=3.3V
AVDD=HPVDD=1.8V
97
90
90
A-weighted (Note 1,2)
85
85
AVDD=HPVDD=1.8V,
fs = 96kHz
Dynamic Range (Note 2)
Total Harmonic Distortion
A-weighted, -60dB
full scale input
DR
90
-84
-81
-88
dB
dB
THD
AVDD=HPVDD=3.3V,
1kHz, 0dBFS
AVDD=HPVDD=1.8V,
1kHz, 0dBFs
-75
AVDD=HPVDD=1.8V
1kHz, -3dBFs
Power Supply Rejection Ratio
DAC channel separation
PSRR
1kHz 100mVpp
50
45
dB
dB
20Hz to 20kHz
100mVpp
1kHz, 0dB signal
100
Analogue Line Input to Line Output (Load = 10kΩ. 50pF, No Gain on Input ) Bypass Mode
0dB Full scale output voltage
Signal to Noise Ratio
AVDD/3.3
99
Vrms
dB
SNR
THD
AVDD=HPVDD=3.3V
AVDD=HPVDD=1.8V
A-weighted (Note 1,2)
90
101
Total Harmonic Distortion
AVDD=HPVDD=3.3V,
1kHz, 0dBFS
-90
dB
AVDD=HPVDD=1.8V ,
1kHz, 0dB
-93
-85
PD, Rev 4.1, April 2007
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